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Subject: socsvn commit: r269505 - soc2014/op/freebsd-base/sys/i386/i386
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Author: op
Date: Fri Jun 13 02:01:15 2014
New Revision: 269505
URL: http://svnweb.FreeBSD.org/socsvn/?view=rev&rev=269505

Log:
  SMAP i386: enable SMAP in !BSP case in initcpu
  
  git: https://github.com/opntr/opBSD/commits/op/gsoc2014/smap
  
  Signed-off-by: Oliver Pinter <oliver.pntr@gmail.com>
  
  

Modified:
  soc2014/op/freebsd-base/sys/i386/i386/initcpu.c

Modified: soc2014/op/freebsd-base/sys/i386/i386/initcpu.c
==============================================================================
--- soc2014/op/freebsd-base/sys/i386/i386/initcpu.c	Fri Jun 13 01:49:30 2014	(r269504)
+++ soc2014/op/freebsd-base/sys/i386/i386/initcpu.c	Fri Jun 13 02:01:15 2014	(r269505)
@@ -671,6 +671,7 @@
 void
 initializecpu(void)
 {
+	uint32_t cr4;
 
 	switch (cpu) {
 #ifdef I486_CPU
@@ -793,6 +794,17 @@
 	if (hw_clflush_disable == 1)
 		cpu_feature &= ~CPUID_CLFSH;
 
+	cr4 = rcr4();
+	/*
+	 * Postpone enabling the SMAP on the boot CPU until the
+	 * page tables are switched from the boot loader identity mapping
+	 * to the kernel tables.  The boot loader enables the U bit in
+	 * its tables.
+	 */
+	if (!IS_BSP() && (cpu_stdext_feature & CPUID_STDEXT_SMAP))
+		cr4 |= CR4_SMAP;
+	load_cr4(cr4);
+
 #if defined(PC98) && !defined(CPU_UPGRADE_HW_CACHE)
 	/*
 	 * OS should flush L1 cache by itself because no PC-98 supports