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Date:      Mon, 2 Jun 2003 22:36:16 -0700 (PDT)
From:      Juli Mallett <jmallett@FreeBSD.org>
To:        Perforce Change Reviews <perforce@freebsd.org>
Subject:   PERFORCE change 32456 for review
Message-ID:  <200306030536.h535aG2i040807@repoman.freebsd.org>

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http://perforce.freebsd.org/chv.cgi?CH=32456

Change 32456 by jmallett@jmallett_dalek on 2003/06/02 22:35:22

	Update for C99 CPP.

Affected files ...

.. //depot/projects/mips/sys/mips/mips/locore.S#8 edit

Differences ...

==== //depot/projects/mips/sys/mips/mips/locore.S#8 (text+ko) ====

@@ -28,7 +28,6 @@
 
 #include <machine/asm.h>
 #include <machine/cpuregs.h>
-#incldue <machine/param.h>
 
 #include "assym.s"
 
@@ -54,48 +53,54 @@
 	.globl btext
 btext:
 ENTRY(start)
-	# t0: Bits to preserve if set:
-	# 	Soft reset
-	#	Boot exception vectors (firmware-provided)
+	/*
+	 * t0: Bits to preserve if set:
+	 * 	Soft reset
+	 *	Boot exception vectors (firmware-provided)
+	 */
 	li	t0, MIPS_SR_BEV | MIPS3_SR_SR
-	# t1: Bits to set explicitly:
-	#	Kernel mode is 64-bit
-	#	Enable FPU
+	/*
+	 * t1: Bits to set explicitly:
+	 *	Kernel mode is 64-bit
+	 *	Enable FPU
+	 */
 	li	t1, MIPS3_SR_KX | MIPS_SR_COP_1_BIT
 
-	# Read coprocessor 0 status register, clear bits not
-	# preserved (namely, clearing interrupt bits), and set
-	# bits we want to explicitly set.
+	/*
+	 * Read coprocessor 0 status register, clear bits not
+	 * preserved (namely, clearing interrupt bits), and set
+	 * bits we want to explicitly set.
+	 */
 	mfc0	t2, MIPS_COP_0_STATUS
 	and	t2, t0
 	or	t2, t1
 	mtc0	t2, MIPS_COP_0_STATUS
 	COP0_SYNC
-	# Extra nops for the FPU to spin up.
+	/* Extra nops for the FPU to spin up. */
 
-	# Clear cause register.
+	/* Clear cause register. */
 	mtc0	zero, MIPS_COP_0_CAUSE
 	COP0_SYNC
 
-	# Read and store the PrID FPU ID for CPU identification.
+	/* Read and store the PrID FPU ID for CPU identification. */
 	mfc0	t0, MIPS_COP_0_PRID
 	cfc1	t1, MIPS_FPU_ID
 	sw	t0, cpu_id
 	sw	t1, fpu_id
 
-	# Set up the GP.
+	/* Set up the GP. */
 	la	gp, _gp
 
-	# Set up our temporary stack.
+	/* Set up our temporary stack. */
 	la	sp, topstack
 
-	# Call the platform-specific startup code.
+	/* Call the platform-specific startup code. */
 	jal	platform_start
 	nop
 
-	# Start MI things rolling.
+	/* Start MI things rolling. */
 	jal	mi_startup
 	nop
 
-	# NOTREACHED
+	/* NOTREACHED */
 END(start)



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