From owner-svn-src-projects@FreeBSD.ORG Sun Dec 21 16:21:29 2014 Return-Path: Delivered-To: svn-src-projects@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 70F3CCA2; Sun, 21 Dec 2014 16:21:29 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 4399A2F04; Sun, 21 Dec 2014 16:21:29 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.9/8.14.9) with ESMTP id sBLGLTxl012482; Sun, 21 Dec 2014 16:21:29 GMT (envelope-from andrew@FreeBSD.org) Received: (from andrew@localhost) by svn.freebsd.org (8.14.9/8.14.9/Submit) id sBLGLT8u012481; Sun, 21 Dec 2014 16:21:29 GMT (envelope-from andrew@FreeBSD.org) Message-Id: <201412211621.sBLGLT8u012481@svn.freebsd.org> X-Authentication-Warning: svn.freebsd.org: andrew set sender to andrew@FreeBSD.org using -f From: Andrew Turner Date: Sun, 21 Dec 2014 16:21:29 +0000 (UTC) To: src-committers@freebsd.org, svn-src-projects@freebsd.org Subject: svn commit: r276014 - projects/arm_intrng/sys/arm/arm X-SVN-Group: projects MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-projects@freebsd.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: "SVN commit messages for the src " projects" tree" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 21 Dec 2014 16:21:29 -0000 Author: andrew Date: Sun Dec 21 16:21:28 2014 New Revision: 276014 URL: https://svnweb.freebsd.org/changeset/base/276014 Log: Fix a few mismerge and style issues Modified: projects/arm_intrng/sys/arm/arm/gic.c Modified: projects/arm_intrng/sys/arm/arm/gic.c ============================================================================== --- projects/arm_intrng/sys/arm/arm/gic.c Sun Dec 21 16:15:29 2014 (r276013) +++ projects/arm_intrng/sys/arm/arm/gic.c Sun Dec 21 16:21:28 2014 (r276014) @@ -112,6 +112,7 @@ struct arm_gic_softc { struct mtx mutex; uint32_t nirqs; }; + static struct resource_spec arm_gic_spec[] = { { SYS_RES_MEMORY, 0, RF_ACTIVE }, /* Distributor registers */ { SYS_RES_MEMORY, 1, RF_ACTIVE }, /* CPU Interrupt Intf. registers */ @@ -187,8 +188,7 @@ arm_gic_init_secondary(device_t dev) /* Enable interrupt distribution */ gic_d_write_4(sc, GICD_CTLR, 0x01); - - /* Activate IRQ 29, ie private timer IRQ*/ + /* * Activate the timer interrupts: virtual, secure, and non-secure. */ @@ -305,7 +305,7 @@ arm_gic_attach(device_t dev) } for (i = 0; i < sc->nirqs; i += 4) { - gic_d_write_4(sc, GICD_IPRIORITYR(i >> 2), 0); + gic_d_write_4(sc, GICD_IPRIORITYR(i >> 2), 0); gic_d_write_4(sc, GICD_ITARGETSR(i >> 2), 1 << 0 | 1 << 8 | 1 << 16 | 1 << 24); } @@ -334,12 +334,11 @@ arm_gic_intr(void *arg) active_irq = gic_c_read_4(sc, GICC_IAR); - /* + /* * Immediatly EOIR the SGIs, because doing so requires the other * bits (ie CPU number), not just the IRQ number, and we do not * have this information later. */ - if ((active_irq & 0x3ff) <= GIC_LAST_IPI) gic_c_write_4(sc, GICC_EOIR, active_irq); active_irq &= 0x3FF; @@ -463,7 +462,7 @@ arm_gic_ipi_read(device_t dev, int i) * The intr code will automagically give the frame pointer * if the interrupt argument is 0. */ - if ((unsigned int)i > 16) + if ((unsigned int)i > 16) return (0); return (i); }