From owner-p4-projects@FreeBSD.ORG Fri Jan 10 22:16:34 2014 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id E5D6EC01; Fri, 10 Jan 2014 22:16:33 +0000 (UTC) Delivered-To: perforce@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1 with cipher ADH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id A71AFBFF for ; Fri, 10 Jan 2014 22:16:33 +0000 (UTC) Received: from skunkworks.freebsd.org (skunkworks.freebsd.org [IPv6:2001:1900:2254:2068::682:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mx1.freebsd.org (Postfix) with ESMTPS id 917CF15A5 for ; Fri, 10 Jan 2014 22:16:33 +0000 (UTC) Received: from skunkworks.freebsd.org ([127.0.1.74]) by skunkworks.freebsd.org (8.14.7/8.14.7) with ESMTP id s0AMGX9N097890 for ; Fri, 10 Jan 2014 22:16:33 GMT (envelope-from jhb@freebsd.org) Received: (from perforce@localhost) by skunkworks.freebsd.org (8.14.7/8.14.7/Submit) id s0AMGXh9097887 for perforce@freebsd.org; Fri, 10 Jan 2014 22:16:33 GMT (envelope-from jhb@freebsd.org) Date: Fri, 10 Jan 2014 22:16:33 GMT Message-Id: <201401102216.s0AMGXh9097887@skunkworks.freebsd.org> X-Authentication-Warning: skunkworks.freebsd.org: perforce set sender to jhb@freebsd.org using -f From: John Baldwin Subject: PERFORCE change 1189943 for review To: Perforce Change Reviews Precedence: bulk X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.17 List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 10 Jan 2014 22:16:34 -0000 http://p4web.freebsd.org/@@1189943?ac=10 Change 1189943 by jhb@jhb_jhbbsd on 2014/01/10 22:15:56 Tidy. Affected files ... .. //depot/projects/pci/sys/dev/pci/pci.c#48 edit .. //depot/projects/pci/sys/dev/pci/pcireg.h#10 edit Differences ... ==== //depot/projects/pci/sys/dev/pci/pci.c#48 (text+ko) ==== @@ -74,6 +74,13 @@ (((cfg)->hdrtype == PCIM_HDRTYPE_NORMAL && reg == PCIR_BIOS) || \ ((cfg)->hdrtype == PCIM_HDRTYPE_BRIDGE && reg == PCIR_BIOS_1)) +/* + * TODO + * - PCI-e cap interrupt handler for status changes to PCI-e cap regs? + * - PCI-e AER and PCI error reporting + * - PCI-e hotplug + */ + static int pci_has_quirk(uint32_t devid, int quirk); static pci_addr_t pci_mapbase(uint64_t mapreg); static const char *pci_maptype(uint64_t mapreg); ==== //depot/projects/pci/sys/dev/pci/pcireg.h#10 (text+ko) ==== @@ -704,10 +704,10 @@ #define PCIEM_LINK_CAP_ASPM_COMPLIANCE 0x00400000 #define PCIEM_LINK_CAP_PORT 0xff000000 #define PCIER_LINK_CTL 0x10 -#define PCIEM_LINK_CTL_ASPMC_DIS 0x0000 -#define PCIEM_LINK_CTL_ASPMC_L0S 0x0001 -#define PCIEM_LINK_CTL_ASPMC_L1 0x0002 #define PCIEM_LINK_CTL_ASPMC 0x0003 +#define PCIEM_LINK_ASPMC_DIS 0x0000 +#define PCIEM_LINK_ASPMC_L0S 0x0001 +#define PCIEM_LINK_ASPMC_L1 0x0002 #define PCIEM_LINK_CTL_RCB 0x0008 #define PCIEM_LINK_CTL_LINK_DIS 0x0010 #define PCIEM_LINK_CTL_RETRAIN_LINK 0x0020 @@ -791,6 +791,11 @@ #define PCIEM_CTL2_END2END_TLP 0x8000 #define PCIER_DEVICE_STA2 0x2a #define PCIER_LINK_CAP2 0x2c +#define PCIEM_LINK_CAP2_LINK_SPEEDS_VEC 0x000000fe +#define PCIEM_LINK_SPEED_25 0x00000002 +#define PCIEM_LINK_SPEED_50 0x00000004 +#define PCIEM_LINK_SPEED_80 0x00000008 +#define PCIEM_LINK_CAP2_CROSSLINK 0x00000100 #define PCIER_LINK_CTL2 0x30 #define PCIER_LINK_STA2 0x32 #define PCIER_SLOT_CAP2 0x34