From owner-freebsd-current@freebsd.org Sat Jan 6 03:39:16 2018 Return-Path: Delivered-To: freebsd-current@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id C6913EB5F48 for ; Sat, 6 Jan 2018 03:39:16 +0000 (UTC) (envelope-from areilly@bigpond.net.au) Received: from nsstlmta10p.bpe.bigpond.com (nsstlmta10p.bpe.bigpond.com [203.38.21.10]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client CN "", Issuer "Openwave Messaging Inc." (not verified)) by mx1.freebsd.org (Postfix) with ESMTPS id CB12E6FE26 for ; Sat, 6 Jan 2018 03:39:13 +0000 (UTC) (envelope-from areilly@bigpond.net.au) Received: from smtp.telstra.com ([10.10.24.4]) by nsstlfep16p-svc.bpe.nexus.telstra.com.au with ESMTP id <20180106023034.GMTR30649.nsstlfep16p-svc.bpe.nexus.telstra.com.au@smtp.telstra.com>; Sat, 6 Jan 2018 13:30:34 +1100 X-RG-Spam: Unknown X-RazorGate-Vade: gggruggvucftvghtrhhoucdtuddrgedtuddrjeekgdegkecutefuodetggdotefrodftvfcurfhrohhfihhlvgemucfupfevtfgpvffgnffuvfftteenuceurghilhhouhhtmecufedttdenucesvcftvggtihhpihgvnhhtshculddquddttddmnecujfgurhepfffhvffukfhfgggtuggjfgesthdtredttdervdenucfhrhhomheptehnughrvgifucftvghilhhlhicuoegrrhgvihhllhihsegsihhgphhonhgurdhnvghtrdgruheqnecukfhppeduvdegrdduledtrdegtddrudekvdenucfrrghrrghmpehhvghlohepkggvnhdrrggtqdhrrdhnuhdpihhnvghtpeduvdegrdduledtrdegtddrudekvddpmhgrihhlfhhrohhmpeeorghrvghilhhlhiessghighhpohhnugdrnhgvthdr X-RG-VS-CLASS: clean X-Authentication-Info: Submitted using ID areilly@bigpond.net.au Received: from Zen.ac-r.nu (124.190.40.182) by smtp.telstra.com (9.0.019.22-1) (authenticated as areilly@bigpond.net.au) id 5A204A960C02FABD; Sat, 6 Jan 2018 13:30:34 +1100 Date: Sat, 6 Jan 2018 13:30:29 +1100 From: Andrew Reilly To: blubee blubeeme Cc: "Klaus P. Ohrhallinger" , FreeBSD current Subject: Re: Intel CPU design flaw - FreeBSD affected? // disabling _R_DTSC Message-ID: <20180106015852.GA46842@Zen.ac-r.nu> References: <9dda0496-be16-35c6-6c45-63d03b218ccb@protected-networks.net> <18376c97-3c0d-49c8-9483-96b95a84f3f1@7he.at> <52b2f48c-332c-8984-838f-4902da0ebc81@7he.at> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.9.2 (2017-12-15) X-BeenThere: freebsd-current@freebsd.org X-Mailman-Version: 2.1.25 Precedence: list List-Id: Discussions about the use of FreeBSD-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 06 Jan 2018 03:39:16 -0000 On Fri, Jan 05, 2018 at 02:27:40AM +0800, blubee blubeeme wrote: > I'd love to see if RISC-V is vulnerable to this? > > I think they are in the best position to capitalize on this clusterfk... It's a micro-architecture flaw, not an instruction set flaw, so just as for ARM and amd64, it will depend on the specific version. The only RISC-V hardware that I'm aware of is in-order (no speculation) so unlikely to be affected. There aren't any data-centre-scale RISC-V systems yet, but some are being worked-on. Will be interesting to see if they suddenly push out roadmaps while they go back to re-design to avoid this... Cheers, Andrew