From owner-cvs-src-old@FreeBSD.ORG Sat Mar 20 05:49:18 2010 Return-Path: Delivered-To: cvs-src-old@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id AF6521065672 for ; Sat, 20 Mar 2010 05:49:18 +0000 (UTC) (envelope-from neel@FreeBSD.org) Received: from repoman.freebsd.org (repoman.freebsd.org [IPv6:2001:4f8:fff6::29]) by mx1.freebsd.org (Postfix) with ESMTP id 9BF8F8FC14 for ; Sat, 20 Mar 2010 05:49:18 +0000 (UTC) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.14.3/8.14.3) with ESMTP id o2K5nIAN052744 for ; Sat, 20 Mar 2010 05:49:18 GMT (envelope-from neel@repoman.freebsd.org) Received: (from svn2cvs@localhost) by repoman.freebsd.org (8.14.3/8.14.3/Submit) id o2K5nIQn052743 for cvs-src-old@freebsd.org; Sat, 20 Mar 2010 05:49:18 GMT (envelope-from neel@repoman.freebsd.org) Message-Id: <201003200549.o2K5nIQn052743@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: svn2cvs set sender to neel@repoman.freebsd.org using -f From: Neel Natu Date: Sat, 20 Mar 2010 05:49:06 +0000 (UTC) To: cvs-src-old@freebsd.org X-FreeBSD-CVS-Branch: HEAD Subject: cvs commit: src/sys/mips/include clock.h src/sys/mips/mips tick.c src/sys/mips/sibyte sb_machdep.c sb_scd.c sb_scd.h X-BeenThere: cvs-src-old@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: **OBSOLETE** CVS commit messages for the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sat, 20 Mar 2010 05:49:18 -0000 neel 2010-03-20 05:49:06 UTC FreeBSD src repository Modified files: sys/mips/include clock.h sys/mips/mips tick.c sys/mips/sibyte sb_machdep.c sb_scd.c sb_scd.h Log: SVN rev 205364 on 2010-03-20 05:49:06Z by neel Sibyte provides a 64-bit read-only counter that counts at half the processor frequency. This counter can be accessed coherently from both cores. Use this as the preferred timecounter for the SWARM kernels. The CP0 COUNT register is unusable as the timecounter on SMP platforms because the COUNT registers on different CPUs are not guaranteed to be in sync. Revision Changes Path 1.2 +8 -0 src/sys/mips/include/clock.h 1.8 +5 -0 src/sys/mips/mips/tick.c 1.8 +30 -0 src/sys/mips/sibyte/sb_machdep.c 1.4 +9 -0 src/sys/mips/sibyte/sb_scd.c 1.4 +1 -0 src/sys/mips/sibyte/sb_scd.h