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Date:      Thu, 28 Apr 2005 06:02:22 GMT
From:      Marcel Moolenaar <marcel@FreeBSD.org>
To:        Perforce Change Reviews <perforce@freebsd.org>
Subject:   PERFORCE change 76120 for review
Message-ID:  <200504280602.j3S62MQN006112@repoman.freebsd.org>
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http://perforce.freebsd.org/chv.cgi?CH=76120

Change 76120 by marcel@marcel_nfs on 2005/04/28 06:01:39

	Next round of changes to allow VGA addresses across PCI-PCI
	bridges:
	o  Add defines for all bits in the bridge control register
	   to pcireg.h. Remove the one I added to pcib_private.h
	o  Create inline versions to check for VGA address ranges
	   in pcireg.h and remove the one I added to pci_pci.h
	o  Have the APB driver use the new functions instead of
	   duplicating the code.
	o  Fix the VGA address range check to be conformant to the
	   PCI-to-PCI Bridge architecture specification. Use <=
	   to check the upper bound so that we use the exact same
	   values as documented (without having the reader convert
	   the inclusive addresses in the docs to the exclusive
	   upper-bound addresses used in the code).
	
	Discussed with: imp, jhb
	BCR defines contributed by: jhb

Affected files ...

.. //depot/projects/tty/sys/dev/pci/pci_pci.c#10 edit
.. //depot/projects/tty/sys/dev/pci/pcib_private.h#5 edit
.. //depot/projects/tty/sys/dev/pci/pcireg.h#6 edit
.. //depot/projects/tty/sys/dev/pci/pcivar.h#6 edit
.. //depot/projects/tty/sys/sparc64/pci/apb.c#7 edit

Differences ...

==== //depot/projects/tty/sys/dev/pci/pci_pci.c#10 (text+ko) ====

@@ -293,23 +293,6 @@
 	return (sc->iobase > 0 && sc->iobase < sc->iolimit);
 }
 
-static __inline int
-is_vga_resource(int type, u_long start, u_long end)
-{
-	switch (type) {
-	case SYS_RES_IOPORT:
-		if ((start >= 0x3b0 && end < 0x3bc) ||
-		    (start >= 0x3c0 && end < 0x3dc))
-			return (1);
-		break;
-	case SYS_RES_MEMORY:
-		if (start >= 0xa0000 && end < 0xc0000)
-			return (1);
-		break;
-	}
-	return (0);
-}
-
 /*
  * We have to trap resource allocation requests and ensure that the bridge
  * is set up to, or capable of handling them.
@@ -335,7 +318,7 @@
 		 * Make sure we allow access to VGA I/O addresses when the
 		 * bridge has the "VGA Enable" bit set.
 		 */
-		if (!ok && is_vga_resource(type, start, end))
+		if (!ok && pci_is_vga_ioport_range(start, end))
 			ok = (sc->bridgectl & PCIB_BCR_VGA_ENABLE) ? 1 : 0;
 
 		if ((sc->flags & PCIB_SUBTRACTIVE) == 0) {
@@ -387,7 +370,7 @@
 		 * Make sure we allow access to VGA memory addresses when the
 		 * bridge has the "VGA Enable" bit set.
 		 */
-		if (!ok && is_vga_resource(type, start, end))
+		if (!ok && pci_is_vga_memory_range(start, end))
 			ok = (sc->bridgectl & PCIB_BCR_VGA_ENABLE) ? 1 : 0;
 
 		if ((sc->flags & PCIB_SUBTRACTIVE) == 0) {

==== //depot/projects/tty/sys/dev/pci/pcib_private.h#5 (text+ko) ====

@@ -57,7 +57,6 @@
     uint32_t	iolimit;	/* topmost address of port window */
     uint16_t	secstat;	/* secondary bus status register */
     uint16_t	bridgectl;	/* bridge control register */
-#define	PCIB_BCR_VGA_ENABLE	(1 << 3)
     uint8_t	seclat;		/* secondary bus latency timer */
 };
 

==== //depot/projects/tty/sys/dev/pci/pcireg.h#6 (text+ko) ====

@@ -313,6 +313,19 @@
 
 #define PCIC_OTHER	0xff
 
+/* Bridge Control Values. */
+#define	PCIB_BCR_PERR_ENABLE		0x0001
+#define	PCIB_BCR_SERR_ENABLE		0x0002
+#define	PCIB_BCR_ISA_ENABLE		0x0004
+#define	PCIB_BCR_VGA_ENABLE		0x0008
+#define	PCIB_BCR_MASTER_ABORT_MODE	0x0020
+#define	PCIB_BCR_SECBUS_RESET		0x0040
+#define	PCIB_BCR_SECBUS_BACKTOBACK	0x0080
+#define	PCIB_BCR_PRI_DISCARD_TIMEOUT	0x0100
+#define	PCIB_BCR_SEC_DISCARD_TIMEOUT	0x0200
+#define	PCIB_BCR_DISCARD_TIMER_STATUS	0x0400
+#define	PCIB_BCR_DISCARD_TIMER_SERREN	0x0800
+
 /* PCI power manangement */
 
 #define PCIR_POWER_CAP		0x2

==== //depot/projects/tty/sys/dev/pci/pcivar.h#6 (text+ko) ====

@@ -288,6 +288,24 @@
 }
 
 /*
+ * Check if the address range falls within the VGA defined address range(s)
+ */
+static __inline int
+pci_is_vga_ioport_range(u_long start, u_long end)
+{
+ 
+	return (((start >= 0x3b0 && end <= 0x3bb) ||
+	    (start >= 0x3c0 && end <= 0x3df)) ? 1 : 0);
+}
+
+static __inline int
+pci_is_vga_memory_range(u_long start, u_long end)
+{
+
+	return ((start >= 0xa0000 && end <= 0xbffff) ? 1 : 0);
+}
+
+/*
  * PCI power states are as defined by ACPI:
  *
  * D0	State in which device is on and running.  It is receiving full

==== //depot/projects/tty/sys/sparc64/pci/apb.c#7 (text+ko) ====

@@ -161,13 +161,6 @@
 {
 	int i, ei;
 
-	/* Allow the legacy VGA ranges. */
-	if ((start >= 0x3b0 && end < 0x3bc) ||
-	    (start >= 0x3c0 && end < 0x3dc) ||
-	    (start >= 0xa0000 && end < 0xc0000))
-		return (1);
-
-	/* Check the map. */
 	i = start / scale;
 	ei = end / scale;
 	if (i > 7 || ei > 7)
@@ -218,6 +211,7 @@
     u_long start, u_long end, u_long count, u_int flags)
 {
 	struct apb_softc *sc;
+	int ok;
 
 	sc = device_get_softc(dev);
 
@@ -240,7 +234,10 @@
 	 */
 	switch (type) {
 	case SYS_RES_IOPORT:
-		if (!apb_checkrange(sc->sc_iomap, APB_IO_SCALE, start, end)) {
+		ok = apb_checkrange(sc->sc_iomap, APB_IO_SCALE, start, end);
+		if (!ok && pci_is_vga_ioport_range(start, end))
+			ok = 1;
+		if (!ok) {
 			device_printf(dev, "device %s%d requested unsupported "
 			    "I/O range 0x%lx-0x%lx\n", device_get_name(child),
 			    device_get_unit(child), start, end);
@@ -254,7 +251,10 @@
 		break;
 
 	case SYS_RES_MEMORY:
-		if (!apb_checkrange(sc->sc_memmap, APB_MEM_SCALE, start, end)) {
+		ok = apb_checkrange(sc->sc_memmap, APB_MEM_SCALE, start, end);
+		if (!ok && pci_is_vga_memory_range(start, end))
+			ok = 1;
+		if (!ok) {
 			device_printf(dev, "device %s%d requested unsupported "
 			    "memory range 0x%lx-0x%lx\n",
 			    device_get_name(child), device_get_unit(child),

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