From owner-svn-src-all@FreeBSD.ORG Tue May 24 05:49:03 2011 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id E15F7106564A; Tue, 24 May 2011 05:49:02 +0000 (UTC) (envelope-from adrian@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id C7F6E8FC20; Tue, 24 May 2011 05:49:02 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.4/8.14.4) with ESMTP id p4O5n2rA053979; Tue, 24 May 2011 05:49:02 GMT (envelope-from adrian@svn.freebsd.org) Received: (from adrian@localhost) by svn.freebsd.org (8.14.4/8.14.4/Submit) id p4O5n2wk053977; Tue, 24 May 2011 05:49:02 GMT (envelope-from adrian@svn.freebsd.org) Message-Id: <201105240549.p4O5n2wk053977@svn.freebsd.org> From: Adrian Chadd Date: Tue, 24 May 2011 05:49:02 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r222241 - head/sys/dev/ath/ath_hal/ar5416 X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 24 May 2011 05:49:03 -0000 Author: adrian Date: Tue May 24 05:49:02 2011 New Revision: 222241 URL: http://svn.freebsd.org/changeset/base/222241 Log: Use the new per-series antenna and TPC definitions when setting ctl8->11. This should hopefully make it clearer to developers what is going on and when TPC is being hacked on, make it obvious why it isn't working for series 1, 2, 3. I won't flip on setting TX power for TX series 1, 2, 3 until I've done some further testing with Kite to ensure it doesn't break anything. (Before people ask - yes, TPC is only needed for 5ghz regdomains and yes, Kite is a 2.4ghz only chip, but there are potential use cases for 2ghz TPC. I just need to sit down and ensure it's supported and functional.) Modified: head/sys/dev/ath/ath_hal/ar5416/ar5416_xmit.c Modified: head/sys/dev/ath/ath_hal/ar5416/ar5416_xmit.c ============================================================================== --- head/sys/dev/ath/ath_hal/ar5416/ar5416_xmit.c Tue May 24 05:34:45 2011 (r222240) +++ head/sys/dev/ath/ath_hal/ar5416/ar5416_xmit.c Tue May 24 05:49:02 2011 (r222241) @@ -208,10 +208,11 @@ ar5416SetupTxDesc(struct ath_hal *ah, st | SM(ahp->ah_tx_chainmask, AR_ChainSel2) | SM(ahp->ah_tx_chainmask, AR_ChainSel3) ; - ads->ds_ctl8 = 0; - ads->ds_ctl9 = (txPower << 24); /* XXX? */ - ads->ds_ctl10 = (txPower << 24); /* XXX? */ - ads->ds_ctl11 = (txPower << 24); /* XXX? */ + ads->ds_ctl8 = SM(0, AR_AntCtl0); + ads->ds_ctl9 = SM(0, AR_AntCtl1) | SM(txPower, AR_XmitPower1); + ads->ds_ctl10 = SM(0, AR_AntCtl2) | SM(txPower, AR_XmitPower2); + ads->ds_ctl11 = SM(0, AR_AntCtl3) | SM(txPower, AR_XmitPower3); + if (keyIx != HAL_TXKEYIX_INVALID) { /* XXX validate key index */ ads->ds_ctl1 |= SM(keyIx, AR_DestIdx); @@ -232,11 +233,16 @@ ar5416SetupTxDesc(struct ath_hal *ah, st ads->ds_ctl7 |= (rtsctsRate << AR_RTSCTSRate_S); } + /* + * Set the TX antenna to 0 for Kite + * To preserve existing behaviour, also set the TPC bits to 0; + * when TPC is enabled these should be filled in appropriately. + */ if (AR_SREV_KITE(ah)) { - ads->ds_ctl8 = 0; - ads->ds_ctl9 = 0; - ads->ds_ctl10 = 0; - ads->ds_ctl11 = 0; + ads->ds_ctl8 = SM(0, AR_AntCtl0); + ads->ds_ctl9 = SM(0, AR_AntCtl1) | SM(0, AR_XmitPower1); + ads->ds_ctl10 = SM(0, AR_AntCtl2) | SM(0, AR_XmitPower2); + ads->ds_ctl11 = SM(0, AR_AntCtl3) | SM(0, AR_XmitPower3); } return AH_TRUE; #undef RTSCTS @@ -410,10 +416,10 @@ ar5416SetupFirstTxDesc(struct ath_hal *a | SM(AH5416(ah)->ah_tx_chainmask, AR_ChainSel3); /* NB: no V1 WAR */ - ads->ds_ctl8 = 0; - ads->ds_ctl9 = (txPower << 24); - ads->ds_ctl10 = (txPower << 24); - ads->ds_ctl11 = (txPower << 24); + ads->ds_ctl8 = SM(0, AR_AntCtl0); + ads->ds_ctl9 = SM(0, AR_AntCtl1) | SM(txPower, AR_XmitPower1); + ads->ds_ctl10 = SM(0, AR_AntCtl2) | SM(txPower, AR_XmitPower2); + ads->ds_ctl11 = SM(0, AR_AntCtl3) | SM(txPower, AR_XmitPower3); ads->ds_ctl6 &= ~(0xffff); ads->ds_ctl6 |= SM(aggrLen, AR_AggrLen); @@ -424,11 +430,16 @@ ar5416SetupFirstTxDesc(struct ath_hal *a | (flags & HAL_TXDESC_RTSENA ? AR_RTSEnable : 0); } + /* + * Set the TX antenna to 0 for Kite + * To preserve existing behaviour, also set the TPC bits to 0; + * when TPC is enabled these should be filled in appropriately. + */ if (AR_SREV_KITE(ah)) { - ads->ds_ctl8 = 0; - ads->ds_ctl9 = 0; - ads->ds_ctl10 = 0; - ads->ds_ctl11 = 0; + ads->ds_ctl8 = SM(0, AR_AntCtl0); + ads->ds_ctl9 = SM(0, AR_AntCtl1) | SM(0, AR_XmitPower1); + ads->ds_ctl10 = SM(0, AR_AntCtl2) | SM(0, AR_XmitPower2); + ads->ds_ctl11 = SM(0, AR_AntCtl3) | SM(0, AR_XmitPower3); } return AH_TRUE;