From owner-svn-src-stable@freebsd.org Wed Mar 4 20:53:01 2020 Return-Path: Delivered-To: svn-src-stable@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id 3D67E250EAB; Wed, 4 Mar 2020 20:53:01 +0000 (UTC) (envelope-from manu@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) server-signature RSA-PSS (4096 bits) client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "Let's Encrypt Authority X3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 48XmL40CtYz4YgW; Wed, 4 Mar 2020 20:52:59 +0000 (UTC) (envelope-from manu@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id D9A432406A; Wed, 4 Mar 2020 20:52:59 +0000 (UTC) (envelope-from manu@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id 024Kqx93017786; Wed, 4 Mar 2020 20:52:59 GMT (envelope-from manu@FreeBSD.org) Received: (from manu@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id 024KqxAd017783; Wed, 4 Mar 2020 20:52:59 GMT (envelope-from manu@FreeBSD.org) Message-Id: <202003042052.024KqxAd017783@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: manu set sender to manu@FreeBSD.org using -f From: Emmanuel Vadot Date: Wed, 4 Mar 2020 20:52:59 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-12@freebsd.org Subject: svn commit: r358642 - in stable/12/sys: arm64/conf arm64/rockchip conf X-SVN-Group: stable-12 X-SVN-Commit-Author: manu X-SVN-Commit-Paths: in stable/12/sys: arm64/conf arm64/rockchip conf X-SVN-Commit-Revision: 358642 X-SVN-Commit-Repository: base MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-stable@freebsd.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: SVN commit messages for all the -stable branches of the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 04 Mar 2020 20:53:01 -0000 Author: manu Date: Wed Mar 4 20:52:59 2020 New Revision: 358642 URL: https://svnweb.freebsd.org/changeset/base/358642 Log: MFC r354088: arm64: rockchip: Add rk_dwc3 driver This is a simplebus like driver that attaches the dwc3 child node and enable the clocks needed for the module. Added: stable/12/sys/arm64/rockchip/rk_dwc3.c - copied unchanged from r354088, head/sys/arm64/rockchip/rk_dwc3.c Modified: stable/12/sys/arm64/conf/GENERIC stable/12/sys/conf/files.arm64 Directory Properties: stable/12/ (props changed) Modified: stable/12/sys/arm64/conf/GENERIC ============================================================================== --- stable/12/sys/arm64/conf/GENERIC Wed Mar 4 20:48:29 2020 (r358641) +++ stable/12/sys/arm64/conf/GENERIC Wed Mar 4 20:52:59 2020 (r358642) @@ -186,6 +186,7 @@ device ohci # OHCI USB interface device ehci # EHCI USB interface (USB 2.0) device ehci_mv # Marvell EHCI USB interface device xhci # XHCI PCI->USB interface (USB 3.0) +device rk_dwc3 # Rockchip DWC3 controller device usb # USB Bus (required) device ukbd # Keyboard device umass # Disks/Mass storage - Requires scbus and da Copied: stable/12/sys/arm64/rockchip/rk_dwc3.c (from r354088, head/sys/arm64/rockchip/rk_dwc3.c) ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ stable/12/sys/arm64/rockchip/rk_dwc3.c Wed Mar 4 20:52:59 2020 (r358642, copy of r354088, head/sys/arm64/rockchip/rk_dwc3.c) @@ -0,0 +1,201 @@ +/*- + * SPDX-License-Identifier: BSD-2-Clause-FreeBSD + * + * Copyright (c) 2019 Emmanuel Vadot + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND + * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE + * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE + * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE + * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL + * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS + * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) + * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT + * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + */ + +/* + * Rockchip DWC3 glue + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include +#include +#include +#include +#include + + +#include + +#include +#include +#include +#include + +#include +#include +#include +#include + +static struct ofw_compat_data compat_data[] = { + { "rockchip,rk3399-dwc3", 1 }, + { NULL, 0 } +}; + +struct rk_dwc3_softc { + struct simplebus_softc sc; + device_t dev; + clk_t clk_ref; + clk_t clk_suspend; + clk_t clk_bus; + clk_t clk_axi_perf; + clk_t clk_usb3; + clk_t clk_grf; + hwreset_t rst_usb3; +}; + +static int +rk_dwc3_probe(device_t dev) +{ + phandle_t node; + + if (!ofw_bus_status_okay(dev)) + return (ENXIO); + + if (ofw_bus_search_compatible(dev, compat_data)->ocd_data == 0) + return (ENXIO); + + /* Binding says that we need a child node for the actual dwc3 controller */ + node = ofw_bus_get_node(dev); + if (OF_child(node) <= 0) + return (ENXIO); + + device_set_desc(dev, "Rockchip RK3399 DWC3"); + return (BUS_PROBE_DEFAULT); +} + +static int +rk_dwc3_attach(device_t dev) +{ + struct rk_dwc3_softc *sc; + device_t cdev; + phandle_t node, child; + int err; + + sc = device_get_softc(dev); + sc->dev = dev; + node = ofw_bus_get_node(dev); + + /* Mandatory clocks */ + if (clk_get_by_ofw_name(dev, 0, "ref_clk", &sc->clk_ref) != 0) { + device_printf(dev, "Cannot get ref_clk clock\n"); + return (ENXIO); + } + err = clk_enable(sc->clk_ref); + if (err != 0) { + device_printf(dev, "Could not enable clock %s\n", + clk_get_name(sc->clk_ref)); + return (ENXIO); + } + if (clk_get_by_ofw_name(dev, 0, "suspend_clk", &sc->clk_suspend) != 0) { + device_printf(dev, "Cannot get suspend_clk clock\n"); + return (ENXIO); + } + err = clk_enable(sc->clk_suspend); + if (err != 0) { + device_printf(dev, "Could not enable clock %s\n", + clk_get_name(sc->clk_suspend)); + return (ENXIO); + } + if (clk_get_by_ofw_name(dev, 0, "bus_clk", &sc->clk_bus) != 0) { + device_printf(dev, "Cannot get bus_clk clock\n"); + return (ENXIO); + } + err = clk_enable(sc->clk_bus); + if (err != 0) { + device_printf(dev, "Could not enable clock %s\n", + clk_get_name(sc->clk_bus)); + return (ENXIO); + } + if (clk_get_by_ofw_name(dev, 0, "grf_clk", &sc->clk_grf) != 0) { + device_printf(dev, "Cannot get grf_clk clock\n"); + return (ENXIO); + } + err = clk_enable(sc->clk_grf); + if (err != 0) { + device_printf(dev, "Could not enable clock %s\n", + clk_get_name(sc->clk_grf)); + return (ENXIO); + } + + /* Optional clocks */ + if (clk_get_by_ofw_name(dev, 0, "aclk_usb3_rksoc_axi_perf", &sc->clk_axi_perf) == 0) { + err = clk_enable(sc->clk_axi_perf); + if (err != 0) { + device_printf(dev, "Could not enable clock %s\n", + clk_get_name(sc->clk_axi_perf)); + return (ENXIO); + } + } + if (clk_get_by_ofw_name(dev, 0, "aclk_usb3", &sc->clk_usb3) == 0) { + err = clk_enable(sc->clk_usb3); + if (err != 0) { + device_printf(dev, "Could not enable clock %s\n", + clk_get_name(sc->clk_usb3)); + return (ENXIO); + } + } + + /* Put module out of reset */ + if (hwreset_get_by_ofw_name(dev, node, "usb3-otg", &sc->rst_usb3) == 0) { + if (hwreset_deassert(sc->rst_usb3) != 0) { + device_printf(dev, "Cannot deassert reset\n"); + return (ENXIO); + } + } + + simplebus_init(dev, node); + if (simplebus_fill_ranges(node, &sc->sc) < 0) { + device_printf(dev, "could not get ranges\n"); + return (ENXIO); + } + + for (child = OF_child(node); child > 0; child = OF_peer(child)) { + cdev = simplebus_add_device(dev, child, 0, NULL, -1, NULL); + if (cdev != NULL) + device_probe_and_attach(cdev); + } + + return (bus_generic_attach(dev)); +} + +static device_method_t rk_dwc3_methods[] = { + /* Device interface */ + DEVMETHOD(device_probe, rk_dwc3_probe), + DEVMETHOD(device_attach, rk_dwc3_attach), + + DEVMETHOD_END +}; + +static devclass_t rk_dwc3_devclass; + +DEFINE_CLASS_1(rk_dwc3, rk_dwc3_driver, rk_dwc3_methods, + sizeof(struct rk_dwc3_softc), simplebus_driver); +DRIVER_MODULE(rk_dwc3, simplebus, rk_dwc3_driver, rk_dwc3_devclass, 0, 0); Modified: stable/12/sys/conf/files.arm64 ============================================================================== --- stable/12/sys/conf/files.arm64 Wed Mar 4 20:48:29 2020 (r358641) +++ stable/12/sys/conf/files.arm64 Wed Mar 4 20:52:59 2020 (r358642) @@ -279,6 +279,7 @@ cddl/dev/fbt/aarch64/fbt_isa.c optional dtrace_fbt # RockChip Drivers arm64/rockchip/rk3399_emmcphy.c optional fdt rk_emmcphy soc_rockchip_rk3399 +arm64/rockchip/rk_dwc3.c optional fdt rk_dwc3 soc_rockchip_rk3399 arm64/rockchip/rk_i2c.c optional fdt rk_i2c soc_rockchip_rk3328 | fdt rk_i2c soc_rockchip_rk3399 arm64/rockchip/rk805.c optional fdt rk805 soc_rockchip_rk3328 | fdt rk805 soc_rockchip_rk3399 arm64/rockchip/rk_grf.c optional fdt soc_rockchip_rk3328 | fdt soc_rockchip_rk3399