From owner-freebsd-hackers Wed Jul 1 12:23:35 1998 Return-Path: Received: (from majordom@localhost) by hub.freebsd.org (8.8.8/8.8.8) id MAA05829 for freebsd-hackers-outgoing; Wed, 1 Jul 1998 12:23:35 -0700 (PDT) (envelope-from owner-freebsd-hackers@FreeBSD.ORG) Received: from dingo.cdrom.com (dingo.cdrom.com [204.216.28.145]) by hub.freebsd.org (8.8.8/8.8.8) with ESMTP id MAA05823 for ; Wed, 1 Jul 1998 12:23:33 -0700 (PDT) (envelope-from mike@dingo.cdrom.com) Received: from dingo.cdrom.com (localhost [127.0.0.1]) by dingo.cdrom.com (8.8.8/8.8.5) with ESMTP id MAA00970; Wed, 1 Jul 1998 12:22:59 -0700 (PDT) Message-Id: <199807011922.MAA00970@dingo.cdrom.com> X-Mailer: exmh version 2.0zeta 7/24/97 To: zhihuizhang cc: hackers Subject: Re: Interrupt Handling and inline assembly In-reply-to: Your message of "Mon, 29 Jun 1998 14:42:25 EDT." Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Date: Wed, 01 Jul 1998 12:22:58 -0700 From: Mike Smith Sender: owner-freebsd-hackers@FreeBSD.ORG Precedence: bulk X-Loop: FreeBSD.ORG > > I got two questions: > > (1) I read in the MailingList Archive that the interrupt blocking in > FreeBSD is software-based, we do not communicate with 8259 (which I think > is slower) What is the advantage of doing this besides being faster? If > we mask interrupts off (by cli or setting the IMR register in 8259), will > interrupts be simply discarded (the device has to request interrupt > again) or postponed by 8259? The interrupt mask is manipulated much more often than interrupts are taken, so it makes sense to optimise for this case. Interrupts are always enabled, so the interrupt handler is always called. If the interrupt is masked, the fact that the interrupt was invoked is recorded (see ipending) and the handler returns. When interrupt(s) are unmasked, a check is made to see if any pending interrupts can now be serviced. If interrupts are disabled by cli, they will be delivered at sti. What happens with the 8259 depends on how you disable it. > (2) I am reading the source code in cpufunc.h: > > static __inline void > setbits(volatile unsigned * addr, u_int bits) > { > __asm __volatile("orl %1, %0" : "=m" (*addr): "ir"(bits)); > } > > I have read a text on inline assembly at: > > http://www.rt66.com/~brennan/djgpp/djgpp_asm.html > > But I still do not understand the meaining of "m" and "ir". The gcc info page has more detail. `m' A memory operand is allowed, with any kind of address that the machine supports in general. `r' A register operand is allowed provided that it is in a general register. `i' An immediate integer operand (one with constant value) is allowed. This includes symbolic constants whose values will be known only at assembly time. -- \\ Sometimes you're ahead, \\ Mike Smith \\ sometimes you're behind. \\ mike@smith.net.au \\ The race is long, and in the \\ msmith@freebsd.org \\ end it's only with yourself. \\ msmith@cdrom.com To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-hackers" in the body of the message