Skip site navigation (1)Skip section navigation (2)
Date:      Fri, 09 Jul 1999 10:32:37 +0800
From:      Stephen Hocking-Senior Programmer PGS Tensor Perth <shocking@prth.pgs.com>
To:        current@freebsd.org
Subject:   MTRR stuff
Message-ID:  <199907090232.KAA04002@ariadne.tensor.pgs.com>

next in thread | raw e-mail | index | archive | help
For some video cards (to wit, the voodoo stuff), the MTRRs should be set up as 
follows

   write-combining
 +----------------------------------------------------------+ 
 +-------+
  uncacheable

i.e. the two regions have the same starting area, but the small chunk for the 
registers should be uncacheable. When I try to do this using memconf on my 
K6-2, it spits the dummy. Is there a work around for this?


	Stephen
-- 
  The views expressed above are not those of PGS Tensor.

    "We've heard that a million monkeys at a million keyboards could produce
     the Complete Works of Shakespeare; now, thanks to the Internet, we know
     this is not true."            Robert Wilensky, University of California




To Unsubscribe: send mail to majordomo@FreeBSD.org
with "unsubscribe freebsd-current" in the body of the message




Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?199907090232.KAA04002>