From nobody Tue May 13 15:55:52 2025 X-Original-To: dev-commits-src-all@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4Zxh091WfTz5vYC2; Tue, 13 May 2025 15:55:53 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R11" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4Zxh083V32z3JN5; Tue, 13 May 2025 15:55:52 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1747151752; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=ifn+1yhAe4eZcVHonyk2ncT4iXrxESDMZqukxgiyzuI=; b=AjIzh3XXuQPImno3UK49yXW5wGdViimlS5PQqhnsKMarryCh+xg1ICkMllipz80F2JQRUz 9Lkw3kVIvaRTfcSzjagUHBCrPxFI2TN6tu7z/Gqu3DcFpZRFlNNzFnlZlRmUi6TgJok2EW dX8Ecm4Ne1QWOMFz5relRCaQsVFzdhWoofhcIRBcusXvJW4ZVVzjqC4VBpeKJu+o1CX4I+ eJhDQOyom2J+B9R6xezufG2QddFFBe/OH7TXDA+PwQ7Vm/nCwsVn54L4PMuC9goe7KZYfM xVK7niKjoHTlUr6UGimrsUbF9ZtfzFMHvD3rS0mFHlDdU6M0L3iKn1TBhgMS5w== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1747151752; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=ifn+1yhAe4eZcVHonyk2ncT4iXrxESDMZqukxgiyzuI=; b=eI7GoqOiVDkEG6WZqcV6uWJU8V5zj/gdS22l4m3iAr9nyQ41RPprTkvGU7c+OqOcjbPBeJ W1qyzoHIgeTdTb/vNZaRBMfbj6WEcSlFpWnMtBTb52mFjP+7UJDZXliHxk/uSl3s/ZlRbO f6M70gHLVKYqdecA3qbLOxRcqyGouiiVoQ8f7ntr1pX1ovaRw2CIxPMWMIEq5Rc3TJduEb /O6tlAxdYjhVGhpZAFNNLYiW+qbuwZnCPJOqthvLhjBey5Sd/HmVRYkFY2nC6c8ABjAf9l +J+0kYKq1oG8QNbQ+6PqM/bM3xNhDDUoWhASp/d/6ttAqvGo6/h2ZKZ921/DBw== ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1747151752; a=rsa-sha256; cv=none; b=l5yRFrd6eMWIbJElqDCyspztsc4IbASH281hkV174wI+pLW/RWDfXGSRb15ljIcAunjSrw KClYFrR11ZoKJvG7XIGSsRGKluDegtJRplUo/kdCp/ZhC+7i1OicxHwS3lVr8W+pNBXr2V gMaL2zbOKxiTTNYpQn4fonBsE11hOTMzDbYNbdEx38vMcjciB2iubcGiHNFaHuQxhRK5TJ AFPPew1b2KA7ySdmVh7DYEJoHaTTWaeceOdNWe2JX2CIjmBdgVanyH0AWMDqW/BsDR8axK aNvC5y9D4pkvWZ+9GTuVL9qEzKpi9DhwCTr3MDIna4q+c1NIdYxgQM8mb54vRw== ARC-Authentication-Results: i=1; mx1.freebsd.org; none Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 4Zxh0830qMztN8; Tue, 13 May 2025 15:55:52 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org ([127.0.1.44]) by gitrepo.freebsd.org (8.18.1/8.18.1) with ESMTP id 54DFtqsh030464; Tue, 13 May 2025 15:55:52 GMT (envelope-from git@gitrepo.freebsd.org) Received: (from git@localhost) by gitrepo.freebsd.org (8.18.1/8.18.1/Submit) id 54DFtqxQ030461; Tue, 13 May 2025 15:55:52 GMT (envelope-from git) Date: Tue, 13 May 2025 15:55:52 GMT Message-Id: <202505131555.54DFtqxQ030461@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org From: Ravi Pokala Subject: git: f0d1e0026891 - stable/14 - amdsmn(4), amdtemp(4): Add support for AMD Family 1Ah (Zen5) CPUs List-Id: Commit messages for all branches of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-all List-Help: List-Post: List-Subscribe: List-Unsubscribe: X-BeenThere: dev-commits-src-all@freebsd.org Sender: owner-dev-commits-src-all@FreeBSD.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: rpokala X-Git-Repository: src X-Git-Refname: refs/heads/stable/14 X-Git-Reftype: branch X-Git-Commit: f0d1e002689130a8b34c91c80002cc1fce4dd8ae Auto-Submitted: auto-generated The branch stable/14 has been updated by rpokala: URL: https://cgit.FreeBSD.org/src/commit/?id=f0d1e002689130a8b34c91c80002cc1fce4dd8ae commit f0d1e002689130a8b34c91c80002cc1fce4dd8ae Author: Ravi Pokala AuthorDate: 2025-05-10 06:26:42 +0000 Commit: Ravi Pokala CommitDate: 2025-05-13 15:53:44 +0000 amdsmn(4), amdtemp(4): Add support for AMD Family 1Ah (Zen5) CPUs I found the '1AH_MxxH_ROOT' PCI device IDs in the Linux "AMD K8 Northbridge" driver [1][5]. Since Family 19h (Zen3, Zen4) uses the same registers as Family 17h (Zen1, Zen2), I tried using those same registers for Family 1Ah (Zen5) as well, and they worked. I pulled the 1Ah model ranges from Linux as well [2][3][4][6]. Added some additional logging under 'bootverbose', and used a local variable and macro for the stepping, rather than repeatedly using the mask directly. Consistently report the CPUID (family, model, stepping) using two, zero-padded, un-prefixed, uppercase nybbles, with an 'h' suffix. This is the format used in documentation and in Linux. My own testing with various models of Zen4 EPYC 9xx4 ("Genoa") shows that their CPUID models are in the range 0x10 .. 0x1f. Similar testing with various models of Zen5 EPYC 9xx5 ("Turin") shows that their CPUID models are in the range 0x00 ... 0x2f. [1] 2023-08-10: https://github.com/torvalds/linux/commit/c640166 [2] 2024-01-23: https://github.com/torvalds/linux/commit/3e4147f [3] 2024-01-25: https://github.com/torvalds/linux/commit/b9328fd [4] 2024-04-24: https://github.com/torvalds/linux/commit/2718a7f [5] 2024-07-28: https://github.com/torvalds/linux/commit/59c3400 [6] 2024-07-30: https://github.com/torvalds/linux/commit/bf5641e Sponsored by: Vdura MFC after: 3 days Reviewed by: delphij Differential Revision: https://reviews.freebsd.org/D50278 (cherry picked from commit 2a042fab4f91a525daa6255b69892fb434c62831) --- sys/dev/amdsmn/amdsmn.c | 26 +++++++++++++++++++++++-- sys/dev/amdtemp/amdtemp.c | 49 +++++++++++++++++++++++++++++++++-------------- 2 files changed, 59 insertions(+), 16 deletions(-) diff --git a/sys/dev/amdsmn/amdsmn.c b/sys/dev/amdsmn/amdsmn.c index 262adcc4bff3..b4cdd8c96549 100644 --- a/sys/dev/amdsmn/amdsmn.c +++ b/sys/dev/amdsmn/amdsmn.c @@ -25,7 +25,7 @@ */ /* - * Driver for the AMD Family 15h and 17h CPU System Management Network. + * Driver for the AMD Family 15h, 17h, 19h, 1Ah CPU System Management Network. */ #include @@ -63,6 +63,10 @@ #define PCI_DEVICE_ID_AMD_19H_M40H_ROOT 0x14b5 #define PCI_DEVICE_ID_AMD_19H_M60H_ROOT 0x14d8 /* Also F1AH M40H */ #define PCI_DEVICE_ID_AMD_19H_M70H_ROOT 0x14e8 +#define PCI_DEVICE_ID_AMD_1AH_M00H_ROOT 0x153a +#define PCI_DEVICE_ID_AMD_1AH_M20H_ROOT 0x1507 +#define PCI_DEVICE_ID_AMD_1AH_M60H_ROOT 0x1122 + struct pciid; struct amdsmn_softc { @@ -130,6 +134,24 @@ static const struct pciid { .amdsmn_addr_reg = F17H_SMN_ADDR_REG, .amdsmn_data_reg = F17H_SMN_DATA_REG, }, + { + .amdsmn_vendorid = CPU_VENDOR_AMD, + .amdsmn_deviceid = PCI_DEVICE_ID_AMD_1AH_M00H_ROOT, + .amdsmn_addr_reg = F17H_SMN_ADDR_REG, + .amdsmn_data_reg = F17H_SMN_DATA_REG, + }, + { + .amdsmn_vendorid = CPU_VENDOR_AMD, + .amdsmn_deviceid = PCI_DEVICE_ID_AMD_1AH_M20H_ROOT, + .amdsmn_addr_reg = F17H_SMN_ADDR_REG, + .amdsmn_data_reg = F17H_SMN_DATA_REG, + }, + { + .amdsmn_vendorid = CPU_VENDOR_AMD, + .amdsmn_deviceid = PCI_DEVICE_ID_AMD_1AH_M60H_ROOT, + .amdsmn_addr_reg = F17H_SMN_ADDR_REG, + .amdsmn_data_reg = F17H_SMN_DATA_REG, + }, }; /* @@ -217,7 +239,7 @@ amdsmn_probe(device_t dev) default: return (ENXIO); } - device_set_descf(dev, "AMD Family %xh System Management Network", + device_set_descf(dev, "AMD Family %02Xh System Management Network", family); return (BUS_PROBE_GENERIC); diff --git a/sys/dev/amdtemp/amdtemp.c b/sys/dev/amdtemp/amdtemp.c index cad16c80ee17..1305337112b6 100644 --- a/sys/dev/amdtemp/amdtemp.c +++ b/sys/dev/amdtemp/amdtemp.c @@ -118,6 +118,9 @@ struct amdtemp_softc { #define DEVICEID_AMD_HOSTB19H_M40H_ROOT 0x14b5 #define DEVICEID_AMD_HOSTB19H_M60H_ROOT 0x14d8 /* Also F1AH M40H */ #define DEVICEID_AMD_HOSTB19H_M70H_ROOT 0x14e8 +#define DEVICEID_AMD_HOSTB1AH_M00H_ROOT 0x153a +#define DEVICEID_AMD_HOSTB1AH_M20H_ROOT 0x1507 +#define DEVICEID_AMD_HOSTB1AH_M60H_ROOT 0x1122 static const struct amdtemp_product { uint16_t amdtemp_vendorid; @@ -146,6 +149,9 @@ static const struct amdtemp_product { { VENDORID_AMD, DEVICEID_AMD_HOSTB19H_M40H_ROOT, false }, { VENDORID_AMD, DEVICEID_AMD_HOSTB19H_M60H_ROOT, false }, { VENDORID_AMD, DEVICEID_AMD_HOSTB19H_M70H_ROOT, false }, + { VENDORID_AMD, DEVICEID_AMD_HOSTB1AH_M00H_ROOT, false }, + { VENDORID_AMD, DEVICEID_AMD_HOSTB1AH_M20H_ROOT, false }, + { VENDORID_AMD, DEVICEID_AMD_HOSTB1AH_M60H_ROOT, false }, }; /* @@ -167,7 +173,7 @@ static const struct amdtemp_product { #define AMDTEMP_15H_M60H_REPTMP_CTRL 0xd8200ca4 /* - * Reported Temperature, Family 17h + * Reported Temperature, Family 17h - 1Ah * * According to AMD OSRR for 17H, section 4.2.1, bits 31-21 of this register * provide the current temp. bit 19, when clear, means the temp is reported in @@ -295,21 +301,33 @@ amdtemp_identify(driver_t *driver, device_t parent) static int amdtemp_probe(device_t dev) { - uint32_t family, model; + uint32_t family, model, stepping; - if (resource_disabled("amdtemp", 0)) + if (resource_disabled("amdtemp", 0)) { + if (bootverbose) + device_printf(dev, "Resource disabled\n"); return (ENXIO); - if (!amdtemp_match(device_get_parent(dev), NULL)) + } + if (!amdtemp_match(device_get_parent(dev), NULL)) { + if (bootverbose) + device_printf(dev, "amdtemp_match() failed\n"); return (ENXIO); + } family = CPUID_TO_FAMILY(cpu_id); model = CPUID_TO_MODEL(cpu_id); + stepping = CPUID_TO_STEPPING(cpu_id); switch (family) { case 0x0f: - if ((model == 0x04 && (cpu_id & CPUID_STEPPING) == 0) || - (model == 0x05 && (cpu_id & CPUID_STEPPING) <= 1)) + if ((model == 0x04 && stepping == 0) || + (model == 0x05 && stepping <= 1)) { + if (bootverbose) + device_printf(dev, + "Unsupported (Family=%02Xh, Model=%02Xh, Stepping=%02Xh)\n", + family, model, stepping); return (ENXIO); + } break; case 0x10: case 0x11: @@ -324,7 +342,8 @@ amdtemp_probe(device_t dev) default: return (ENXIO); } - device_set_desc(dev, "AMD CPU On-Die Thermal Sensors"); + device_set_descf(dev, "AMD Family %02Xh CPU On-Die Thermal Sensors", + family); return (BUS_PROBE_GENERIC); } @@ -485,7 +504,7 @@ amdtemp_attach(device_t dev) needsmn = true; break; default: - device_printf(dev, "Bogus family 0x%x\n", family); + device_printf(dev, "Bogus family %02Xh\n", family); return (ENXIO); } @@ -494,7 +513,7 @@ amdtemp_attach(device_t dev) device_get_parent(dev), "amdsmn", -1); if (sc->sc_smn == NULL) { if (bootverbose) - device_printf(dev, "No SMN device found\n"); + device_printf(dev, "No amdsmn(4) device found\n"); return (ENXIO); } } @@ -510,7 +529,7 @@ amdtemp_attach(device_t dev) device_printf(dev, "Erratum 319: temperature measurement may be inaccurate\n"); if (bootverbose) - device_printf(dev, "Found %d cores and %d sensors.\n", + device_printf(dev, "Found %d cores and %d sensors\n", sc->sc_ncores, sc->sc_ntemps > 1 ? sc->sc_ntemps * sc->sc_ncores : 1); @@ -858,7 +877,7 @@ amdtemp_probe_ccd_sensors17h(device_t dev, uint32_t model) break; default: device_printf(dev, - "Unrecognized Family 17h Model: %02xh\n", model); + "Unrecognized Family 17h Model: %02Xh\n", model); return; } @@ -878,7 +897,7 @@ amdtemp_probe_ccd_sensors19h(device_t dev, uint32_t model) maxreg = 8; _Static_assert((int)NUM_CCDS >= 8, ""); break; - case 0x10 ... 0x1f: + case 0x10 ... 0x1f: /* Zen4 EPYC "Genoa" */ sc->sc_temp_base = AMDTEMP_ZEN4_10H_CCD_TMP_BASE; maxreg = 12; _Static_assert((int)NUM_CCDS >= 12, ""); @@ -892,7 +911,7 @@ amdtemp_probe_ccd_sensors19h(device_t dev, uint32_t model) break; default: device_printf(dev, - "Unrecognized Family 19h Model: %02xh\n", model); + "Unrecognized Family 19h Model: %02Xh\n", model); return; } @@ -906,14 +925,16 @@ amdtemp_probe_ccd_sensors1ah(device_t dev, uint32_t model) uint32_t maxreg; switch (model) { + case 0x00 ... 0x2f: /* Zen5 EPYC "Turin" */ case 0x40 ... 0x4f: /* Zen5 Ryzen "Granite Ridge" */ + case 0x60 ... 0x7f: /* ??? */ sc->sc_temp_base = AMDTEMP_ZEN4_CCD_TMP_BASE; maxreg = 8; _Static_assert((int)NUM_CCDS >= 8, ""); break; default: device_printf(dev, - "Unrecognized Family 1ah Model: %02xh\n", model); + "Unrecognized Family 1Ah Model: %02Xh\n", model); return; }