Date: Thu, 13 Feb 2020 13:32:18 -0800 From: Mark Millard <marklmi@yahoo.com> To: =?utf-8?Q?Klaus_K=C3=BCchemann?= <maciphone2@googlemail.com> Cc: freebsd-arm@freebsd.org Subject: Re: A investigative hack that makes (for example) head -r356529 boot and operate normally an RPi4B (finally!): protect all armstub8-gic.bin's loaded content from replacement by the kernel Message-ID: <BF573B55-0BBA-4228-B08A-CA543E4B294F@yahoo.com> In-Reply-To: <256E923D-AD9A-4DB3-84F7-7BDD55E75691@googlemail.com> References: <7E7605DC-021D-448A-8459-8EC26BA9836D.ref@yahoo.com> <7E7605DC-021D-448A-8459-8EC26BA9836D@yahoo.com> <E1j2EmR-000Mwm-ID@iz-wera-new.HS-Karlsruhe.DE> <CACNAnaHVYeuoK=4f7XzokpAVjcqd6ovD58-0LdP_vPGjiXQgdw@mail.gmail.com> <E1j2FRX-000MyR-1O@iz-wera-new.HS-Karlsruhe.DE> <E1j2G3j-000Mzo-Dw@iz-wera-new.HS-Karlsruhe.DE> <CACNAnaHUwu0GmqW9QZRhS2sMK0HpsjdYRz3YouL5FMBdWBCW-Q@mail.gmail.com> <B64C6065-D804-4D6F-8660-F8DBB9946DEB@yahoo.com> <256E923D-AD9A-4DB3-84F7-7BDD55E75691@googlemail.com>
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On 2020-Feb-13, at 12:51, Klaus K=C3=BCchemann <maciphone2 at =
googlemail.com> wrote:
>=20
>> Am 13.02.2020 um 17:50 schrieb Mark Millard via freebsd-arm =
<freebsd-arm@freebsd.org>:
>>=20
>> There is the cpu-rlease-addr information that seems
>> to refer to some 1st memory page content:
>>=20
>> cpus {
>> #address-cells =3D <0x00000001>;
>> #size-cells =3D <0x00000000>;
>> enable-method =3D "brcm,bcm2836-smp";
>> phandle =3D <0x000000be>;
>> cpu@0 {
>> device_type =3D "cpu";
>> compatible =3D "arm,cortex-a72";
>> reg =3D <0x00000000>;
>> enable-method =3D "spin-table";
>> cpu-release-addr =3D <0x00000000 0x000000d8>;
>> phandle =3D <0x0000001d>;
>> };
>> cpu@1 {
>> device_type =3D "cpu";
>> compatible =3D "arm,cortex-a72";
>> reg =3D <0x00000001>;
>> enable-method =3D "spin-table";
>> cpu-release-addr =3D <0x00000000 0x000000e0>;
>> phandle =3D <0x0000001e>;
>> };
>> cpu@2 {
>> device_type =3D "cpu";
>> compatible =3D "arm,cortex-a72";
>> reg =3D <0x00000002>;
>> enable-method =3D "spin-table";
>> cpu-release-addr =3D <0x00000000 0x000000e8>;
>> phandle =3D <0x0000001f>;
>> };
>> cpu@3 {
>> device_type =3D "cpu";
>> compatible =3D "arm,cortex-a72";
>> reg =3D <0x00000003>;
>> enable-method =3D "spin-table";
>> cpu-release-addr =3D <0x00000000 0x000000f0>;
>> phandle =3D <0x00000020>;
>> };
>> };
>>=20
>>=20
>=20
>=20
> Although I didn=E2=80=99t have yet time to step into debugging just a =
sidenote :
> , the above table shown from you is for bcm2836=20
> Where for bcm-2711 dtsi :
Do not confuse the .dtsi with the live DTB reported
by the RPi4B u-boot itself (the address as reported
during a prior boot sequence). I show more extraction
context this time:
U-Boot> fdt addr 0x7ef2000=20
U-Boot> fdt print
/ {
. . .
cpus {
#address-cells =3D <0x00000001>;
#size-cells =3D <0x00000000>;
enable-method =3D "brcm,bcm2836-smp";
phandle =3D <0x000000be>;
cpu@0 {
device_type =3D "cpu";
compatible =3D "arm,cortex-a72";
reg =3D <0x00000000>;
enable-method =3D "spin-table";
cpu-release-addr =3D <0x00000000 0x000000d8>;
phandle =3D <0x0000001d>;
};
cpu@1 {
device_type =3D "cpu";
compatible =3D "arm,cortex-a72";
reg =3D <0x00000001>;
enable-method =3D "spin-table";
cpu-release-addr =3D <0x00000000 0x000000e0>;
phandle =3D <0x0000001e>;
};
cpu@2 {
device_type =3D "cpu";
compatible =3D "arm,cortex-a72";
reg =3D <0x00000002>;
enable-method =3D "spin-table";
cpu-release-addr =3D <0x00000000 0x000000e8>;
phandle =3D <0x0000001f>;
};
cpu@3 {
device_type =3D "cpu";
compatible =3D "arm,cortex-a72";
reg =3D <0x00000003>;
enable-method =3D "spin-table";
cpu-release-addr =3D <0x00000000 0x000000f0>;
phandle =3D <0x00000020>;
};
};
. . .
Yes, the live RPi4B u-boot reports: brcm,bcm2836-smp
I've no clue if this is a problem.
>=20
> cpu0: cpu@0 {
> device_type =3D "cpu";
> compatible =3D "arm,cortex-a72";
> reg =3D <0>;
> enable-method =3D "spin-table";
> cpu-release-addr =3D <0x0 0x000000d8>;
> };
>=20
> cpu1: cpu@1 {
> device_type =3D "cpu";
> compatible =3D "arm,cortex-a72";
> reg =3D <1>;
> enable-method =3D "spin-table";
> cpu-release-addr =3D <0x0 0x000000e0>;
> };
>=20
> cpu2: cpu@2 {
> device_type =3D "cpu";
> compatible =3D "arm,cortex-a72";
> reg =3D <2>;
> enable-method =3D "spin-table";
> cpu-release-addr =3D <0x0 0x000000e8>;
> };
>=20
> cpu3: cpu@3 {
> device_type =3D "cpu";
> compatible =3D "arm,cortex-a72";
> reg =3D <3>;
> enable-method =3D "spin-table";
> cpu-release-addr =3D <0x0 0x000000f0>;
> };
> };
This source code seems to be irrelevant to what I reported
about the live DTB in use.
=3D=3D=3D
Mark Millard
marklmi at yahoo.com
( dsl-only.net went
away in early 2018-Mar)
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