From owner-cvs-src-old@FreeBSD.ORG Thu Jan 13 17:00:44 2011 Return-Path: Delivered-To: cvs-src-old@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 67FDE106564A for ; Thu, 13 Jan 2011 17:00:44 +0000 (UTC) (envelope-from jhb@FreeBSD.org) Received: from repoman.freebsd.org (repoman.freebsd.org [IPv6:2001:4f8:fff6::29]) by mx1.freebsd.org (Postfix) with ESMTP id 54F6C8FC16 for ; Thu, 13 Jan 2011 17:00:44 +0000 (UTC) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.14.4/8.14.4) with ESMTP id p0DH0i3P018943 for ; Thu, 13 Jan 2011 17:00:44 GMT (envelope-from jhb@repoman.freebsd.org) Received: (from svn2cvs@localhost) by repoman.freebsd.org (8.14.4/8.14.4/Submit) id p0DH0iKc018942 for cvs-src-old@freebsd.org; Thu, 13 Jan 2011 17:00:44 GMT (envelope-from jhb@repoman.freebsd.org) Message-Id: <201101131700.p0DH0iKc018942@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: svn2cvs set sender to jhb@repoman.freebsd.org using -f From: John Baldwin Date: Thu, 13 Jan 2011 17:00:22 +0000 (UTC) To: cvs-src-old@freebsd.org X-FreeBSD-CVS-Branch: HEAD Subject: cvs commit: src/sys/amd64/amd64 apic_vector.S src/sys/i386/i386 apic_vector.s src/sys/x86/x86 local_apic.c X-BeenThere: cvs-src-old@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: **OBSOLETE** CVS commit messages for the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 13 Jan 2011 17:00:44 -0000 jhb 2011-01-13 17:00:22 UTC FreeBSD src repository Modified files: sys/amd64/amd64 apic_vector.S sys/i386/i386 apic_vector.s sys/x86/x86 local_apic.c Log: SVN rev 217360 on 2011-01-13 17:00:22Z by jhb If an interrupt on an I/O APIC is moved to a different CPU after it has started to execute, it seems that the corresponding ISR bit in the "old" local APIC can be cleared. This causes the local APIC interrupt routine to fail to find an interrupt to service. Rather than panic'ing in this case, simply return from the interrupt without sending an EOI to the local APIC. If there are any other pending interrupts in other ISR registers, the local APIC will assert a new interrupt. Tested by: steve Revision Changes Path 1.119 +4 -6 src/sys/amd64/amd64/apic_vector.S 1.119 +4 -6 src/sys/i386/i386/apic_vector.s 1.19 +0 -2 src/sys/x86/x86/local_apic.c