From owner-freebsd-arch@FreeBSD.ORG Fri Mar 13 18:31:09 2015 Return-Path: Delivered-To: freebsd-arch@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 3CCE9EF3; Fri, 13 Mar 2015 18:31:09 +0000 (UTC) Received: from bigwig.baldwin.cx (bigwig.baldwin.cx [IPv6:2001:470:1f11:75::1]) (using TLSv1 with cipher DHE-RSA-CAMELLIA256-SHA (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 13E0DA0; Fri, 13 Mar 2015 18:31:09 +0000 (UTC) Received: from ralph.baldwin.cx (pool-173-54-116-245.nwrknj.fios.verizon.net [173.54.116.245]) by bigwig.baldwin.cx (Postfix) with ESMTPSA id ACE4BB93B; Fri, 13 Mar 2015 14:31:07 -0400 (EDT) From: John Baldwin To: Nathan Whitehorn Subject: Re: RFC: Simplfying hyperthreading distinctions Date: Fri, 13 Mar 2015 13:58:37 -0400 Message-ID: <2058936.CdnVTM8mMb@ralph.baldwin.cx> User-Agent: KMail/4.14.2 (FreeBSD/10.1-STABLE; KDE/4.14.2; amd64; ; ) In-Reply-To: <54FA5EE9.4090305@freebsd.org> References: <1640664.8z9mx3EOQs@ralph.baldwin.cx> <54FA5EE9.4090305@freebsd.org> MIME-Version: 1.0 Content-Transfer-Encoding: 7Bit Content-Type: text/plain; charset="us-ascii" X-Greylist: Sender succeeded SMTP AUTH, not delayed by milter-greylist-4.2.7 (bigwig.baldwin.cx); Fri, 13 Mar 2015 14:31:07 -0400 (EDT) Cc: 'Andriy Gapon' , freebsd-arch@freebsd.org X-BeenThere: freebsd-arch@freebsd.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: Discussion related to FreeBSD architecture List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Fri, 13 Mar 2015 18:31:09 -0000 On Friday, March 06, 2015 06:14:01 PM Nathan Whitehorn wrote: > > On 03/06/15 12:44, John Baldwin wrote: > > Currently we go out of our way a bit to distinguish Pentium4-era > > hyperthreading from more recent ("modern") hyperthreading. I suspect that > > this distinction probably results in confusion more than anything else. > > Intel's documentation does not make near as broad a distinction as far as I > > can tell. Both types of SMT are called hyperthreading in the SDM for example. > > However, we have the astonishing behavior that > > 'machdep.hyperthreading_allowed' only affects "old" hyperthreads, but not > > "new" ones. We also try to be overly cute in our dmesg output by using HTT > > for "old" hyperthreading, and SMT for "new" hyperthreading. I propose the > > following changes to simplify things a bit: > > > > 1) Call both "old" and "new" hyperthreading HTT in dmesg. > > > > 2) Change machdep.hyperthreading_allowed to apply to both new and old HTT. > > However, doing this means a POLA violation in that we would now disable > > modern HTT by default. Balanced against re-enabling "old" HTT by default > > on an increasingly-shrinking pool of old hardware, I think the better > > approach here would be to also change the default to allow HTT. > > > > 3) Possibly add a different knob (or change the behavior of > > machdep.hyperthreading_allowed) to still bring up hyperthreads, but leave > > them out of the default cpuset (set 1). This would allow those threads > > to be re-enabled dynamically at runtime by adjusting the mask on set 1. > > The original htt settings back when 'hyperthreading_allowed' was > > introduced actually permitted this via by adjusting 'machdep.hlt_cpus' at > > runtime. > > > > What do people think? > > I'm fine with whatever naming, but if we're making new sysctls, > especially for the cpuset case, is there a reason to hide the behavior > under machdep? We support at least three non-x86 CPUs with SMT (POWER8, > Cell, and POWER5) and the relevant scheduling logic should be MI. At > least POWER8 supports 8 threads per core, so you might also want more > granularity than just "on" or "off". 3) would involve something new, yes, but my immediate concern is more 1) and 2) to make x86 more consistent. I would certainly be fine with having an MI name for 3). When I've prototyped it before I did it in an MD SYSINIT, but I can perhaps make use of the topology flags to do this in MI code instead. -- John Baldwin