From owner-cvs-src-old@FreeBSD.ORG Tue Jun 23 21:45:55 2009 Return-Path: Delivered-To: cvs-src-old@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id BA172106568E for ; Tue, 23 Jun 2009 21:45:55 +0000 (UTC) (envelope-from mav@FreeBSD.org) Received: from repoman.freebsd.org (repoman.freebsd.org [IPv6:2001:4f8:fff6::29]) by mx1.freebsd.org (Postfix) with ESMTP id A700D8FC08 for ; Tue, 23 Jun 2009 21:45:55 +0000 (UTC) (envelope-from mav@FreeBSD.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.14.3/8.14.3) with ESMTP id n5NLjtJh074524 for ; Tue, 23 Jun 2009 21:45:55 GMT (envelope-from mav@repoman.freebsd.org) Received: (from svn2cvs@localhost) by repoman.freebsd.org (8.14.3/8.14.3/Submit) id n5NLjtaZ074523 for cvs-src-old@freebsd.org; Tue, 23 Jun 2009 21:45:55 GMT (envelope-from mav@repoman.freebsd.org) Message-Id: <200906232145.n5NLjtaZ074523@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: svn2cvs set sender to mav@repoman.freebsd.org using -f From: Alexander Motin Date: Tue, 23 Jun 2009 21:45:33 +0000 (UTC) To: cvs-src-old@freebsd.org X-FreeBSD-CVS-Branch: HEAD Subject: cvs commit: src/sys/amd64/isa clock.c src/sys/i386/isa clock.c X-BeenThere: cvs-src-old@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: **OBSOLETE** CVS commit messages for the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 23 Jun 2009 21:45:56 -0000 mav 2009-06-23 21:45:33 UTC FreeBSD src repository Modified files: sys/amd64/isa clock.c sys/i386/isa clock.c Log: SVN rev 194772 on 2009-06-23 21:45:33Z by mav Rework r193814: While general idea of patch was good, it was not working properly due the way it was implemented. When we are using same timer interrupt for several of hard/prof/stat purposes we should not send several IPIs same time to other CPUs. Sending several IPIs same time leads to terrible accounting/profiling results due to strong synchronization effect, when the second interrupt handler accounts processing of the first one. Interlink timer events in a such way, that no more then one IPI is sent for any original timer interrupt. Revision Changes Path 1.249 +31 -34 src/sys/amd64/isa/clock.c 1.253 +32 -36 src/sys/i386/isa/clock.c