Date: Sun, 3 Aug 1997 13:34:08 -0700 (MST) From: Terry Lambert <terry@lambert.org> To: tony@dell.com (Tony Overfield) Cc: terry@lambert.org, hackers@FreeBSD.ORG Subject: Re: Pentium II? Message-ID: <199708032034.NAA02135@phaeton.artisoft.com> In-Reply-To: <3.0.2.32.19970803041901.006a69e4@bugs.us.dell.com> from "Tony Overfield" at Aug 3, 97 04:19:01 am
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> >I have a friend who had one until the Pentium math bugs reared their
> >ugly heads (he was an IDE weenie, so he didn't care that PCI bus
> >mastering failed on the thing).
>
> Can you remember a specific model number? If so, I can reach up onto
> my shelf and pull one of them down and measure it. I doubt it, but
> maybe I measured it wrong the first time around.
I will get the information from him the next time we talk (if he
remembers, that is).
> >Unless a DMA initiated by a controller rather than the host occurs.
> >Check the -hackers list archives for postings on disabling the L1
> >and L2 cache on these monstrosities...
>
> I tried searching -hackers ("Dell AND disabl* AND cach*") and only
> found one claim (yours, BTW) that this bug exists. Interestingly,
> the only reply seemed to disagree with your claim. Perhaps you can
> offer some better search keywords.
Yes, I can. Search for "PCI" instead of "Dell"; this was a property
of the Saturn I, Neptune I, and Mecury I chipsets, not a property
of only Dell computers -- any computer using those chips blew the
cache line invalidation following a DMA from a PCI controller to
main memory.
You can search for "April 1994", which was the date (Bruce, I believe)
provided for the chipmask change. It's mentioned in most of the
later messages...
> Don't forget than Pentium memory is 64 bits wide and 486/50 memory
> is 32 bits wide. Thus, your fancy 486/50 memory bus cannot help to
> explain your faster I/O claims, so maybe you've got a "magic I/O bus."
Actually, PCI busses are only 32 bits wide, so the 64 bit processor
memory path is totally irrelevent for bus master DMA speed. The
width limitation is at the bus-to-memory interface, not at the
processor.
Terry Lambert
terry@lambert.org
---
Any opinions in this posting are my own and not those of my present
or previous employers.
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