From owner-svn-src-head@FreeBSD.ORG Mon May 11 20:58:07 2015 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id CB02D9F6; Mon, 11 May 2015 20:58:07 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id AC3F21B1A; Mon, 11 May 2015 20:58:07 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.9/8.14.9) with ESMTP id t4BKw7vj079983; Mon, 11 May 2015 20:58:07 GMT (envelope-from jhibbits@FreeBSD.org) Received: (from jhibbits@localhost) by svn.freebsd.org (8.14.9/8.14.9/Submit) id t4BKw6Zj079978; Mon, 11 May 2015 20:58:06 GMT (envelope-from jhibbits@FreeBSD.org) Message-Id: <201505112058.t4BKw6Zj079978@svn.freebsd.org> X-Authentication-Warning: svn.freebsd.org: jhibbits set sender to jhibbits@FreeBSD.org using -f From: Justin Hibbits Date: Mon, 11 May 2015 20:58:06 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r282783 - in head/sys: conf dev/pci powerpc/mpc85xx X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 11 May 2015 20:58:08 -0000 Author: jhibbits Date: Mon May 11 20:58:05 2015 New Revision: 282783 URL: https://svnweb.freebsd.org/changeset/base/282783 Log: Add a PCI bridge for the Freescale PCIe Root Complex Summary: The Freescale PCIe Root Complex shows up as a Processor class device, PowerPC subclass, so the generic PCI code ignores it for a bridge. This adds support for it. As part of this, update the Freescale PCI hostbridge driver, to allow probing beyond the root complex, instead of only allowing "proper" PCI-PCI bridges. Reviewers: #powerpc, marcel, nwhitehorn Reviewed By: nwhitehorn Subscribers: imp Differential Revision: https://reviews.freebsd.org/D2442 Relnotes: yes Added: head/sys/powerpc/mpc85xx/pci_mpc85xx_pcib.c (contents, props changed) Modified: head/sys/conf/files.powerpc head/sys/dev/pci/pci_pci.c head/sys/dev/pci/pcib_private.h head/sys/powerpc/mpc85xx/pci_mpc85xx.c Modified: head/sys/conf/files.powerpc ============================================================================== --- head/sys/conf/files.powerpc Mon May 11 20:33:46 2015 (r282782) +++ head/sys/conf/files.powerpc Mon May 11 20:58:05 2015 (r282783) @@ -138,6 +138,7 @@ powerpc/mpc85xx/mpc85xx.c optional mpc85 powerpc/mpc85xx/mpc85xx_gpio.c optional mpc85xx gpio powerpc/mpc85xx/platform_mpc85xx.c optional mpc85xx powerpc/mpc85xx/pci_mpc85xx.c optional pci mpc85xx +powerpc/mpc85xx/pci_mpc85xx_pcib.c optional pci mpc85xx powerpc/ofw/ofw_machdep.c standard powerpc/ofw/ofw_pci.c optional pci powerpc/ofw/ofw_pcibus.c optional pci Modified: head/sys/dev/pci/pci_pci.c ============================================================================== --- head/sys/dev/pci/pci_pci.c Mon May 11 20:33:46 2015 (r282782) +++ head/sys/dev/pci/pci_pci.c Mon May 11 20:58:05 2015 (r282783) @@ -442,16 +442,7 @@ pcib_probe_windows(struct pcib_softc *sc dev = sc->dev; if (pci_clear_pcib) { - pci_write_config(dev, PCIR_IOBASEL_1, 0xff, 1); - pci_write_config(dev, PCIR_IOBASEH_1, 0xffff, 2); - pci_write_config(dev, PCIR_IOLIMITL_1, 0, 1); - pci_write_config(dev, PCIR_IOLIMITH_1, 0, 2); - pci_write_config(dev, PCIR_MEMBASE_1, 0xffff, 2); - pci_write_config(dev, PCIR_MEMLIMIT_1, 0, 2); - pci_write_config(dev, PCIR_PMBASEL_1, 0xffff, 2); - pci_write_config(dev, PCIR_PMBASEH_1, 0xffffffff, 4); - pci_write_config(dev, PCIR_PMLIMITL_1, 0, 2); - pci_write_config(dev, PCIR_PMLIMITH_1, 0, 4); + pcib_bridge_init(dev); } /* Determine if the I/O port window is implemented. */ @@ -1115,6 +1106,21 @@ pcib_resume(device_t dev) return (bus_generic_resume(dev)); } +void +pcib_bridge_init(device_t dev) +{ + pci_write_config(dev, PCIR_IOBASEL_1, 0xff, 1); + pci_write_config(dev, PCIR_IOBASEH_1, 0xffff, 2); + pci_write_config(dev, PCIR_IOLIMITL_1, 0, 1); + pci_write_config(dev, PCIR_IOLIMITH_1, 0, 2); + pci_write_config(dev, PCIR_MEMBASE_1, 0xffff, 2); + pci_write_config(dev, PCIR_MEMLIMIT_1, 0, 2); + pci_write_config(dev, PCIR_PMBASEL_1, 0xffff, 2); + pci_write_config(dev, PCIR_PMBASEH_1, 0xffffffff, 4); + pci_write_config(dev, PCIR_PMLIMITL_1, 0, 2); + pci_write_config(dev, PCIR_PMLIMITH_1, 0, 4); +} + int pcib_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) { Modified: head/sys/dev/pci/pcib_private.h ============================================================================== --- head/sys/dev/pci/pcib_private.h Mon May 11 20:33:46 2015 (r282782) +++ head/sys/dev/pci/pcib_private.h Mon May 11 20:58:05 2015 (r282783) @@ -145,6 +145,7 @@ void pcib_setup_secbus(device_t dev, st #endif int pcib_attach(device_t dev); void pcib_attach_common(device_t dev); +void pcib_bridge_init(device_t dev); #ifdef NEW_PCIB const char *pcib_child_name(device_t child); #endif Modified: head/sys/powerpc/mpc85xx/pci_mpc85xx.c ============================================================================== --- head/sys/powerpc/mpc85xx/pci_mpc85xx.c Mon May 11 20:33:46 2015 (r282782) +++ head/sys/powerpc/mpc85xx/pci_mpc85xx.c Mon May 11 20:58:05 2015 (r282783) @@ -570,10 +570,19 @@ fsl_pcib_init(struct fsl_pcib_softc *sc, subclass = fsl_pcib_read_config(sc->sc_dev, bus, slot, func, PCIR_SUBCLASS, 1); + /* + * The PCI Root Complex comes up as a Processor/PowerPC, + * but is a bridge. + */ /* Allow only proper PCI-PCI briges */ - if (class != PCIC_BRIDGE) + if (class != PCIC_BRIDGE && class != PCIC_PROCESSOR) continue; - if (subclass != PCIS_BRIDGE_PCI) + if (subclass != PCIS_BRIDGE_PCI && + subclass != PCIS_PROCESSOR_POWERPC) + continue; + + if (subclass == PCIS_PROCESSOR_POWERPC && + hdrtype != PCIM_HDRTYPE_BRIDGE) continue; secbus++; @@ -825,4 +834,3 @@ fsl_pcib_decode_win(phandle_t node, stru return (0); } - Added: head/sys/powerpc/mpc85xx/pci_mpc85xx_pcib.c ============================================================================== --- /dev/null 00:00:00 1970 (empty, because file is newly added) +++ head/sys/powerpc/mpc85xx/pci_mpc85xx_pcib.c Mon May 11 20:58:05 2015 (r282783) @@ -0,0 +1,104 @@ +/*- + * Copyright 2015 Justin Hibbits + * All rights reserved. + * + * Redistribution and use in source and binary forms, with or without + * modification, are permitted provided that the following conditions + * are met: + * 1. Redistributions of source code must retain the above copyright + * notice, this list of conditions and the following disclaimer. + * 2. Redistributions in binary form must reproduce the above copyright + * notice, this list of conditions and the following disclaimer in the + * documentation and/or other materials provided with the distribution. + * 3. The name of the author may not be used to endorse or promote products + * derived from this software without specific prior written permission. + * + * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR + * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES + * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. + * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, + * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, + * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; + * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED + * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, + * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY + * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF + * SUCH DAMAGE. + * + * From: FreeBSD: src/sys/powerpc/mpc85xx/pci_ocp.c,v 1.9 2010/03/23 23:46:28 marcel + */ + +#include +__FBSDID("$FreeBSD$"); + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#include +#include + +#include +#include +#include + +#include "pcib_if.h" + +static int +fsl_pcib_rc_probe(device_t dev) +{ + printf("Probe called\n"); + if (pci_get_vendor(dev) != 0x1957) + return (ENXIO); + if (pci_get_progif(dev) != 0) + return (ENXIO); + if (pci_get_class(dev) != PCIC_PROCESSOR) + return (ENXIO); + if (pci_get_subclass(dev) != PCIS_PROCESSOR_POWERPC) + return (ENXIO); + + return (BUS_PROBE_DEFAULT); +} + +static int +fsl_pcib_rc_attach(device_t dev) +{ + struct pcib_softc *sc; + device_t child; + + pcib_bridge_init(dev); + pcib_attach_common(dev); + + sc = device_get_softc(dev); + if (sc->bus.sec != 0) { + child = device_add_child(dev, "pci", -1); + if (child != NULL) + return (bus_generic_attach(dev)); + } + + return (0); +} + +static device_method_t fsl_pcib_rc_methods[] = { + DEVMETHOD(device_probe, fsl_pcib_rc_probe), + DEVMETHOD(device_attach, fsl_pcib_rc_attach), + DEVMETHOD_END +}; + +static devclass_t fsl_pcib_rc_devclass; +DEFINE_CLASS_1(pcib, fsl_pcib_rc_driver, fsl_pcib_rc_methods, + sizeof(struct pcib_softc), pcib_driver); +DRIVER_MODULE(rcpcib, pci, fsl_pcib_rc_driver, fsl_pcib_rc_devclass, 0, 0); +