From owner-cvs-all Wed Oct 18 8:40:11 2000 Delivered-To: cvs-all@freebsd.org Received: from feral.com (feral.com [192.67.166.1]) by hub.freebsd.org (Postfix) with ESMTP id 85B2737B4D7; Wed, 18 Oct 2000 08:40:06 -0700 (PDT) Received: from bird (bird.feral.com [192.67.166.155]) by feral.com (8.9.3/8.9.3) with ESMTP id IAA20939; Wed, 18 Oct 2000 08:40:07 -0700 Date: Wed, 18 Oct 2000 08:40:05 -0700 (PDT) From: Matthew Jacob Reply-To: mjacob@feral.com To: John Baldwin Cc: cvs-committers@FreeBSD.org, cvs-all@FreeBSD.org Subject: Re: cvs commit: src/sys/i386/include bus_at386.h bus_pc98.h src/sys/ia64/include bus.h src/sys/alpha/include bus.h In-Reply-To: <200010181030.DAA52053@freefall.freebsd.org> Message-ID: MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII Sender: owner-cvs-all@FreeBSD.ORG Precedence: bulk X-Loop: FreeBSD.ORG From the point of view of multiple platform architectures, are the semantics of these guaranteed to include synchronization wrt I/O devices? On Wed, 18 Oct 2000, John Baldwin wrote: > jhb 2000/10/18 03:30:12 PDT > > Modified files: > sys/i386/include bus_at386.h bus_pc98.h > sys/ia64/include bus.h > sys/alpha/include bus.h > Log: > Add in a simple API for memory barriers to machine/bus.h: > - barrier_read() enforces a memory read barrier > - barrier_write() enforces a memory write barrier > - barrier_rw() enforces a memory read/write barrier > > Revision Changes Path > 1.11 +24 -1 src/sys/i386/include/bus_at386.h > 1.12 +24 -1 src/sys/i386/include/bus_pc98.h > 1.2 +23 -1 src/sys/ia64/include/bus.h > 1.7 +13 -1 src/sys/alpha/include/bus.h > > To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe cvs-all" in the body of the message