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Date:      Mon, 27 Apr 1998 07:44:37 +1000 (EST)
From:      Peter Jeremy <peter.jeremy@alcatel.com.au>
To:        hackers@FreeBSD.ORG
Subject:   Re: VM architecture (was Re: Protected mode instructions which reduce to noop.)
Message-ID:  <199804262144.HAA29582@gsms01.alcatel.com.au>

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On Thu, 23 Apr 1998 09:19:30 -0700 (PDT), patl@phoenix.volant.org wrote:
>Subject: 
>From the context, I assumed that he was reffering to IBM's
>mainframe system.  (Originally VM/370 IIRC.)
The origin was CP-67, although I'm not sure if that was a generally
released product.

On Thu, 23 Apr 1998 12:32:48 -0400 (EDT), "David E. Cross" <dec@phoenix.its.rpi.edu> wrote:
> Intel, in their infinite wisdom,
>decided that certain privledged instructions, if executed in an
>unprivledged state, would not trap, but rather reduce to a NOP.
According to my 486 reference manual, all privileged instructions
cause an exception if executed in unpriviledged mode.

What could cause a problem is that various bits in EFLAGS (IF comes to
mind, but there may be others) can only be written in supervisor mode.
Attempts to change these bits in user mode are just ignored (with no
traps).

The only other thing I can think of is confusion regarding `LOCK',
which was priviledged on the 386, but became non-priviledged on the
486 (and presumably above).  It's behaviour was also changed so that
it became a NO-OP if used as a prefix on an inappropriate instruction
(ie one that didn't do a memory RMW).

Note that `virtual-86' mode provides a start.  I don't think it's
capable of supporting the full protected-mode environment though.

On Fri, 24 Apr 1998 06:22:59 +0000 (GMT), Terry Lambert <tlambert@primenet.com> wrote:
>The IBM VM architecture is logically complete -- that is, nearly all
>of the instruction emulation implementation is in hardware,
The VM kernel needs to provide a `virtual supervisor' mode.  This can
be quite expensive in software, so IBM provided microcode assist units
which effectively made `virtual supervisor' mode part of the hardware
machine mode.  Pity that modern microprocessors don't have writable
microcode.

Peter

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