Date: Sat, 8 Apr 1995 08:44:26 -0700 (PDT) From: "Rodney W. Grimes" <rgrimes@gndrsh.aac.dev.com> To: garyj@rks32.pcs.dec.com (Gary Jennejohn) Cc: current@FreeBSD.org Subject: Re: Disk performance Message-ID: <199504081544.IAA15265@gndrsh.aac.dev.com> In-Reply-To: <m0rxXKc-0005OqC@rks32.pcs.dec.com> from "Gary Jennejohn" at Apr 8, 95 12:01:00 pm
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[Note to Gary: Dec's gateway leeked the cc: address on this mail as ``current%freebsd.org@inet-gw-1.pa.dec.com'', I corrected it manually, as those address forms from outside often bounce :-(] > > This is actually more about MB performance. > > Rodney Grimes wrote: > >> I expect to be able towards the end of next week show some really > >> amazing numbers on a Pentium system with respect to memory speeds. > >> Let's all hope that the new EDO and Pipelined Burst SRAM stand up > >> to the theories and we start to see 100++MB/sec main memory speeds on > >> a Pentium like we should. > > c't magazine ran a series of tests on the latest crop of PCI MBs > lately. Here are some of the results: > > ASUS PCI/I-P54TP4 (Triton chipset) with 256kB burst SRAM and 16 MB Well, the correct model number is PCI/I-P54TP4PB if it really has Pipelined Burst Sram. > EDO main mem. > 1st level cache: 407 MB/sec > 2nd level cache: 65 MB/sec > Main mem: 39 MB/sec The numbers I get for the PCI/I-P54TP4 with 256k standard async SRAM are: 1st level cache: 227MB/sec 2nd level cache: 90MB/sec Main memeory: 50MB/sec read, 37MB/sec write > The same MB without 2nd level cache but 16 MB EDO main mem. > 1st level cache: 391 MB/sec > 2nd level cache: N/A > Main mem: 44 MB/sec My EDO memory won't be here until next week :-(. > This board is actually faster w/o the 2nd level cache when EDO RAM > is used ! This was the fastet of all (6) configurations tested. Well, since they didn't report the 2nd level cache number I can not draw that conclusion from the above data. I will draw my own conclusion on that after extensive testing. I just don't buy it, how can 70nS EDO DRAM compete with 10nS Pipelined Burst SRAM. Even with EDO DRAM you need 70nS (>4 external P54C-100 clock ticks) to get to the first memory word vs 20nS (<2 external P54C-100 clock ticks) to get to the cache (It's 20nS because you have to do the tag read then the compare before you supply the data). After the first memory word the EDO *might* be able to supply data ever 15nS, but if I recall correctly it is run on a -2-2-2 burst cycle, the Pipelined burst sram can do it -1-1-1. > > The memmory transfer speeds were tested using some DOS utility developed > by c't. Performance might look different under FBSD. It does... humm... wonder what I can do to the code I am using to get that 400MB/sec internal speed :-). > They tested a whole slew of other things (SCSI, tranfers to a graphics > card, etc.), but it's too much to copy. Well, since FreeBSD would never do that in the real world I don't see a need for that type of test, but one I would like to have would be to test the frame buffer speed of the graphics card. Guess I could go hack on XFree86 Superprobe to see if I can stick this type of test in there. > There's still a ways to go to achieve 100++MB/sec to main mem. This bothers me, 70nS access, 140nS cycle time, 8 bytes wide, 1/140nS * 8 = 57MB/sec. And that is not using the ability to do fast page mode access for addresses in the same page, or burst cycles on EDO simms. The other one that upsets me is MB no longer do memory bank interleaving if you have 2 identical banks (4 simms) that are the same size, which would eliminate the 70nS DRAM recovery time between accesses. > Gary J. -- Rod Grimes rgrimes@gndrsh.aac.dev.com Accurate Automation Company Custom computers for FreeBSD
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