From nobody Mon Aug 4 11:15:14 2025 X-Original-To: dev-commits-src-all@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4bwYr22dcxz63w1Y; Mon, 04 Aug 2025 11:15:14 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R10" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4bwYr21nY4z3G2c; Mon, 04 Aug 2025 11:15:14 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1754306114; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=CSxGOGeyr3LiixEy0h68K50QQGKxdFAos/4AxUXc37g=; b=o7Y94WHtMX0n01HPMoYxv1TvrAIOcd6kzmnPG6wtbUBKUn5AU7ltaz4MA+iMT/6p5bcv4Q /YT4P/Pq4sKTDZ7aT69NGlPnWQHbUjnxQ2YZGCPi9z5N5uDcO1d5aSX3C5WKdesf7vYI+J fZbrGhN922LbOLmcyW0FyHMN24BOTDUi2WelhT4I5fEr1m1qzsTuBSemVaryp3YUBwGoGv h+XChUp0mRpZMf22uE7wb6Lae7dKAv4ywX22T2mvb0F96RjExjwq16y5mko+Gfo5g2us+B UoTvgWWFDBADzmX8d4fOx3+Ce6lNVPJWd5pvTYHQWJc/8CWCNHe4R/sK2aJZkg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1754306114; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=CSxGOGeyr3LiixEy0h68K50QQGKxdFAos/4AxUXc37g=; b=sEw53iNWmfV+sv9k4b7XSnvlkl+2Yq5aaLp7k5XENugK8CoBEOnhNvHfA37MHaG+vpXVwf 5AiQ2a5k8xXWJJE6PN+ARiH4K8iMjKxcSAWx6x9wET3mLM3f67bvqDbYkbei0ESTMstarK deJtOVsfs5e98LlVr6eqpmNOMAObt0QblPKHmxpfQJEyHhn7uc9HmKe8hikpxO4kGddsAG 6Q4/rw8e9QkP1J8sofLf15aWQzCzPoZ13SMwCQMCU/ziHQUx+USsBlIKscoKWJszNoAWDG eLCg9Lr1gP/HF7fz5ZD2iER4uxf2MmR9QtgI5TY9Qt9KcCTSx0omKJ/ktgkqig== ARC-Authentication-Results: i=1; mx1.freebsd.org; none ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1754306114; a=rsa-sha256; cv=none; b=ydPcCpl2eA+Jr9Xx1IW31X7A7rLjmU+kjeuALo+00JGLEkpOlkTCeq4MLZKTNMQxWVYY+q ciJ8kYqz9RyQJo1dcbMBg/913ZGI42EKRBHd6z/eyKsnfL7+F3iGMaprUBaPlQevrLC7zc J23Hg7w3Ve72GJc6jK5FGG7Ufw0Y1c6s1HyFgiFmKvKTUynLB3oiLBXlZqkRS3rD4CkhvY KCW+z222dgUHUVuSz7OTTxNnTEhR53piaL92ZSG36wrCnIjvEEZEShLBtCee8CDFUO0dUt Ui2Na4j5eRrjMJ5F12b+pazZ7RUpiSLWwMLFh9e/WDoQE711zzb0bCnBMx305g== Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 4bwYr21Nfgzmq6; Mon, 04 Aug 2025 11:15:14 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org ([127.0.1.44]) by gitrepo.freebsd.org (8.18.1/8.18.1) with ESMTP id 574BFEfF035886; Mon, 4 Aug 2025 11:15:14 GMT (envelope-from git@gitrepo.freebsd.org) Received: (from git@localhost) by gitrepo.freebsd.org (8.18.1/8.18.1/Submit) id 574BFEB6035883; Mon, 4 Aug 2025 11:15:14 GMT (envelope-from git) Date: Mon, 4 Aug 2025 11:15:14 GMT Message-Id: <202508041115.574BFEB6035883@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org From: Andrew Turner Subject: git: 8986e15f0bb5 - main - arm64: Teach CHECK_CPU_FEAT to handle more values List-Id: Commit messages for all branches of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-all List-Help: List-Post: List-Subscribe: List-Unsubscribe: X-BeenThere: dev-commits-src-all@freebsd.org Sender: owner-dev-commits-src-all@FreeBSD.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: andrew X-Git-Repository: src X-Git-Refname: refs/heads/main X-Git-Reftype: branch X-Git-Commit: 8986e15f0bb524fdb2414240e0df67d911f2fabc Auto-Submitted: auto-generated The branch main has been updated by andrew: URL: https://cgit.FreeBSD.org/src/commit/?id=8986e15f0bb524fdb2414240e0df67d911f2fabc commit 8986e15f0bb524fdb2414240e0df67d911f2fabc Author: Andrew Turner AuthorDate: 2025-07-30 22:07:03 +0000 Commit: Andrew Turner CommitDate: 2025-07-30 22:33:26 +0000 arm64: Teach CHECK_CPU_FEAT to handle more values CHECK_CPU_FEAT only supported checking for features that were enabled when the field is non-zero. There are some features we might need to check where we move between two non-zero values. Support this by passing in the field value name to compare rather than assuming a non-zero value. Sponsored by: Arm Ltd Differential Revision: https://reviews.freebsd.org/D51375 --- sys/arm64/arm64/locore.S | 8 ++++---- sys/arm64/include/asm.h | 7 ++++--- 2 files changed, 8 insertions(+), 7 deletions(-) diff --git a/sys/arm64/arm64/locore.S b/sys/arm64/arm64/locore.S index bb323dbafd85..47c609fad523 100644 --- a/sys/arm64/arm64/locore.S +++ b/sys/arm64/arm64/locore.S @@ -374,7 +374,7 @@ LENTRY(enter_kernel_el) msr sctlr_el1, x2 /* Check for VHE */ - CHECK_CPU_FEAT(x2, ID_AA64MMFR1, VH, .Lno_vhe) + CHECK_CPU_FEAT(x2, ID_AA64MMFR1, VH, IMPL, .Lno_vhe) /* * The kernel will be running in EL2, route exceptions here rather @@ -413,7 +413,7 @@ LENTRY(enter_kernel_el) * Configure the Extended Hypervisor register. This is only valid if * FEAT_HCX is enabled. */ - CHECK_CPU_FEAT(x2, ID_AA64MMFR1, HCX, 2f) + CHECK_CPU_FEAT(x2, ID_AA64MMFR1, HCX, IMPL, 2f) /* Extended Hypervisor Configuration */ mov x2, xzr msr HCRX_EL2_REG, x2 @@ -430,7 +430,7 @@ LENTRY(enter_kernel_el) msr vttbr_el2, xzr /* Check the CPU supports GIC, and configure the CPU interface */ - CHECK_CPU_FEAT(x2, ID_AA64PFR0, GIC, 3f) + CHECK_CPU_FEAT(x2, ID_AA64PFR0, GIC, CPUIF_EN, 3f) mrs x2, icc_sre_el2 orr x2, x2, #ICC_SRE_EL2_EN /* Enable access from insecure EL1 */ @@ -1029,7 +1029,7 @@ LENTRY(start_mmu) * HW management of dirty state is set in C code as it may * need to be disabled because of CPU errata. */ - CHECK_CPU_FEAT(x3, ID_AA64MMFR1, HAFDBS, 1f) + CHECK_CPU_FEAT(x3, ID_AA64MMFR1, HAFDBS, AF, 1f) orr x2, x2, #(TCR_HA) 1: diff --git a/sys/arm64/include/asm.h b/sys/arm64/include/asm.h index 4f373dc4b7e1..f9a64f574fca 100644 --- a/sys/arm64/include/asm.h +++ b/sys/arm64/include/asm.h @@ -77,10 +77,11 @@ * to the given label. The tmp register should be a register able to hold the * temporary data. */ -#define CHECK_CPU_FEAT(tmp, feat_reg, feat, label) \ - mrs tmp, ##feat_reg##_el1; \ +#define CHECK_CPU_FEAT(tmp, feat_reg, feat, min_val, label) \ + mrs tmp, ##feat_reg##_el1; \ ubfx tmp, tmp, ##feat_reg##_##feat##_SHIFT, ##feat_reg##_##feat##_WIDTH; \ - cbz tmp, label + cmp tmp, #(##feat_reg##_##feat##_##min_val## >> ##feat_reg##_##feat##_SHIFT); \ + b.lt label /* * Sets the trap fault handler. The exception handler will return to the