Date: Tue, 22 Mar 2005 17:54:28 GMT From: Gavin Atkinson <gavin.atkinson@ury.york.ac.uk> To: FreeBSD-gnats-submit@FreeBSD.org Subject: kern/79139: Support for more PCIe chipsets Message-ID: <200503221754.j2MHsSVI079911@buffy.york.ac.uk> Resent-Message-ID: <200503221800.j2MI06f3065821@freefall.freebsd.org>
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>Number: 79139
>Category: kern
>Synopsis: Support for more PCIe chipsets
>Confidential: no
>Severity: non-critical
>Priority: low
>Responsible: freebsd-bugs
>State: open
>Quarter:
>Keywords:
>Date-Required:
>Class: sw-bug
>Submitter-Id: current-users
>Arrival-Date: Tue Mar 22 18:00:06 GMT 2005
>Closed-Date:
>Last-Modified:
>Originator: Gavin Atkinson
>Release: FreeBSD 5.4-PRERELEASE i386
>Organization:
>Environment:
System: FreeBSD buffy.york.ac.uk 5.4-PRERELEASE FreeBSD 5.4-PRERELEASE #11: Sat Mar 12 10:56:24 GMT 2005 root@buffy.york.ac.uk:/usr/obj/usr/src/sys/BUFFY i386
>Description:
Add support for the Intel 7320 and 915 PCIe chipsets. Also
restructure code slightly to make more chipsets easier to add in the
future.
>How-To-Repeat:
N/A
>Fix:
--- pcie.diff begins here ---
Index: src/sys/i386/pci/pci_cfgreg.c
===================================================================
RCS file: /usr/cvs/src/sys/i386/pci/pci_cfgreg.c,v
retrieving revision 1.116
diff -u -r1.116 pci_cfgreg.c
--- src/sys/i386/pci/pci_cfgreg.c 6 Jan 2005 22:18:17 -0000 1.116
+++ src/sys/i386/pci/pci_cfgreg.c 22 Mar 2005 17:50:15 -0000
@@ -153,15 +153,19 @@
* This also implies that it can do PCIe extended config cycles.
*/
- /* Check for the Intel 7520 and 925 chipsets */
+ /* Check for supported chipsets */
vid = pci_cfgregread(0, 0, 0, 0x0, 2);
did = pci_cfgregread(0, 0, 0, 0x2, 2);
- if ((vid == 0x8086) && (did == 0x3590)) {
- pciebar = pci_cfgregread(0, 0, 0, 0xce, 2) << 16;
- pciereg_cfgopen();
- } else if ((vid == 0x8086) && (did == 0x2580)) {
- pciebar = pci_cfgregread(0, 0, 0, 0x48, 4);
- pciereg_cfgopen();
+ if (vid == 0x8086) {
+ if (did == 0x3590 || did == 0x3592) {
+ /* Intel 7520 or 7320 */
+ pciebar = pci_cfgregread(0, 0, 0, 0xce, 2) << 16;
+ pciereg_cfgopen();
+ } else if (did == 0x2580 || did == 0x2584) {
+ /* Intel 915 or 925 */
+ pciebar = pci_cfgregread(0, 0, 0, 0x48, 4);
+ pciereg_cfgopen();
+ }
}
return(1);
--- pcie.diff ends here ---
>Release-Note:
>Audit-Trail:
>Unformatted:
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