From owner-cvs-src-old@FreeBSD.ORG Thu Nov 19 22:53:58 2009 Return-Path: Delivered-To: cvs-src-old@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id DA97210656A3 for ; Thu, 19 Nov 2009 22:53:58 +0000 (UTC) (envelope-from yongari@FreeBSD.org) Received: from repoman.freebsd.org (repoman.freebsd.org [IPv6:2001:4f8:fff6::29]) by mx1.freebsd.org (Postfix) with ESMTP id C7CBE8FC26 for ; Thu, 19 Nov 2009 22:53:58 +0000 (UTC) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.14.3/8.14.3) with ESMTP id nAJMrwRW073549 for ; Thu, 19 Nov 2009 22:53:58 GMT (envelope-from yongari@repoman.freebsd.org) Received: (from svn2cvs@localhost) by repoman.freebsd.org (8.14.3/8.14.3/Submit) id nAJMrwUt073548 for cvs-src-old@freebsd.org; Thu, 19 Nov 2009 22:53:58 GMT (envelope-from yongari@repoman.freebsd.org) Message-Id: <200911192253.nAJMrwUt073548@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: svn2cvs set sender to yongari@repoman.freebsd.org using -f From: Pyun YongHyeon Date: Thu, 19 Nov 2009 22:53:41 +0000 (UTC) To: cvs-src-old@freebsd.org X-FreeBSD-CVS-Branch: HEAD Subject: cvs commit: src/sys/dev/et if_et.c X-BeenThere: cvs-src-old@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: **OBSOLETE** CVS commit messages for the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 19 Nov 2009 22:53:58 -0000 yongari 2009-11-19 22:53:41 UTC FreeBSD src repository Modified files: sys/dev/et if_et.c Log: SVN rev 199561 on 2009-11-19 22:53:41Z by yongari Use capability pointer to access PCIe registers rather than directly access them at fixed address. Frequently the register offset could be changed if additional PCI capabilities are added to controller. One odd thing is ET_PCIR_L0S_L1_LATENCY register. I think it's PCIe link capabilities register but the location of the register does not match with PCIe capability pointer + offset. I'm not sure it's shadow register of PCIe link capabilities register. Revision Changes Path 1.11 +26 -18 src/sys/dev/et/if_et.c