From owner-svn-src-head@FreeBSD.ORG Tue May 19 09:22:07 2015 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 3EEA497; Tue, 19 May 2015 09:22:07 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 139C51814; Tue, 19 May 2015 09:22:07 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.9/8.14.9) with ESMTP id t4J9M6tJ029640; Tue, 19 May 2015 09:22:06 GMT (envelope-from hselasky@FreeBSD.org) Received: (from hselasky@localhost) by svn.freebsd.org (8.14.9/8.14.9/Submit) id t4J9M6eT029639; Tue, 19 May 2015 09:22:06 GMT (envelope-from hselasky@FreeBSD.org) Message-Id: <201505190922.t4J9M6eT029639@svn.freebsd.org> X-Authentication-Warning: svn.freebsd.org: hselasky set sender to hselasky@FreeBSD.org using -f From: Hans Petter Selasky Date: Tue, 19 May 2015 09:22:06 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r283103 - head/sys/dev/usb/controller X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 19 May 2015 09:22:07 -0000 Author: hselasky Date: Tue May 19 09:22:06 2015 New Revision: 283103 URL: https://svnweb.freebsd.org/changeset/base/283103 Log: Fix for DWC OTG device side isochronous transfers. The even or odd isochronous frame bit needs to be flipped. MFC after: 3 days Modified: head/sys/dev/usb/controller/dwc_otg.c Modified: head/sys/dev/usb/controller/dwc_otg.c ============================================================================== --- head/sys/dev/usb/controller/dwc_otg.c Tue May 19 08:37:03 2015 (r283102) +++ head/sys/dev/usb/controller/dwc_otg.c Tue May 19 09:22:06 2015 (r283103) @@ -1557,6 +1557,22 @@ dwc_otg_data_rx(struct dwc_otg_softc *sc /* release FIFO */ dwc_otg_common_rx_ack(sc); + temp = sc->sc_out_ctl[td->ep_no]; + + /* check for isochronous mode */ + if ((temp & DIEPCTL_EPTYPE_MASK) == + (DIEPCTL_EPTYPE_ISOC << DIEPCTL_EPTYPE_SHIFT)) { + /* toggle odd or even frame bit */ + if (temp & DIEPCTL_SETD1PID) { + temp &= ~DIEPCTL_SETD1PID; + temp |= DIEPCTL_SETD0PID; + } else { + temp &= ~DIEPCTL_SETD0PID; + temp |= DIEPCTL_SETD1PID; + } + sc->sc_out_ctl[td->ep_no] = temp; + } + /* check if we are complete */ if ((td->remainder == 0) || got_short) { if (td->short_pkt) { @@ -2132,10 +2148,23 @@ repeat: temp = sc->sc_in_ctl[td->ep_no]; + /* check for isochronous mode */ + if ((temp & DIEPCTL_EPTYPE_MASK) == + (DIEPCTL_EPTYPE_ISOC << DIEPCTL_EPTYPE_SHIFT)) { + /* toggle odd or even frame bit */ + if (temp & DIEPCTL_SETD1PID) { + temp &= ~DIEPCTL_SETD1PID; + temp |= DIEPCTL_SETD0PID; + } else { + temp &= ~DIEPCTL_SETD0PID; + temp |= DIEPCTL_SETD1PID; + } + sc->sc_in_ctl[td->ep_no] = temp; + } + /* must enable before writing data to FIFO */ DWC_OTG_WRITE_4(sc, DOTG_DIEPCTL(td->ep_no), temp | - DIEPCTL_EPENA | - DIEPCTL_CNAK); + DIEPCTL_EPENA | DIEPCTL_CNAK); td->tx_bytes = count;