From owner-cvs-src@FreeBSD.ORG Wed Dec 5 08:25:29 2007 Return-Path: Delivered-To: cvs-src@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 3DD5016A421 for ; Wed, 5 Dec 2007 08:25:29 +0000 (UTC) (envelope-from silby@silby.com) Received: from relay00.pair.com (relay00.pair.com [209.68.5.9]) by mx1.freebsd.org (Postfix) with SMTP id 6E48213C442 for ; Wed, 5 Dec 2007 08:25:28 +0000 (UTC) (envelope-from silby@silby.com) Received: (qmail 25348 invoked from network); 5 Dec 2007 07:58:46 -0000 Received: from unknown (HELO localhost) (unknown) by unknown with SMTP; 5 Dec 2007 07:58:46 -0000 X-pair-Authenticated: 209.68.2.70 Date: Wed, 5 Dec 2007 01:58:48 -0600 (CST) From: Mike Silbersack To: Joseph Koshy In-Reply-To: <86prxm5ksk.wl%koshy@unixconsulting.co.in> Message-ID: <20071205015603.S12467@odysseus.silby.com> References: <200712031050.lB3AowcL055057@repoman.freebsd.org> <86prxm5ksk.wl%koshy@unixconsulting.co.in> MIME-Version: 1.0 Content-Type: TEXT/PLAIN; charset=US-ASCII; format=flowed Cc: Kip Macy , src-committers@freebsd.org, cvs-all@freebsd.org, cvs-src@freebsd.org Subject: Re: cvs commit: src/sys/dev/hwpmc hwpmc_x86.c X-BeenThere: cvs-src@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: CVS commit messages for the src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 05 Dec 2007 08:25:29 -0000 On Wed, 5 Dec 2007, Joseph Koshy wrote: > km> Can you say a little more about what the differences are or where one > km> could find a discussion of them without wading through different > km> processor model revisions? Kris, SCC, and I have been obtaining > km> sensible results using 0xE and 0xF for the small set of sampling > km> operations that we use. > > So in short, although Core/Core2 PMCs overlap the functionality of > the P6 PMCs they are not 100% backward compatible with them. > > Regards, > Koshy Based on the encyclopedic knowledge you recited above, it sounds like it should take you five minutes to type in the necessary code to allow Core / Core 2 processors to work with the minimal set of registers that we already know to work. Please do that - these are extremely mainstream processors that everyone expects us to have support (even if it's not complete) for. -Mike