From owner-freebsd-current  Wed Sep  1 15:48:37 1999
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To: Garrett Wollman <wollman@khavrinen.lcs.mit.edu>
Subject: Re: followup to apm problems. 
Cc: Mike Smith <mike@smith.net.au>, nate@mt.sri.com (Nate Williams),
	Mitsuru IWASAKI <iwasaki@jp.FreeBSD.org>, mmuir@es.co.nz,
	freebsd-current@FreeBSD.ORG
In-reply-to: Your message of "Wed, 01 Sep 1999 09:45:38 EDT."
		<199909011345.JAA05781@khavrinen.lcs.mit.edu> 
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Date: Wed, 01 Sep 1999 16:47:36 -0600
From: Warner Losh <imp@village.org>
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In message <199909011345.JAA05781@khavrinen.lcs.mit.edu> Garrett
Wollman writes: 
: And designs based on the Intel PIIX4 will generate SMI# interrupts for
: whichever activities are programmed in the BIOS, completely bypassing
: the traditional interrupt mechanism.

So does that mean if we do disable them at the PIC level we'll be OK?

Warner


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