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From: Juli Mallett <jmallett@FreeBSD.org>
Date: Fri, 30 Apr 2010 03:14:47 +0000 (UTC)
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Subject: svn commit: r207417 - user/jmallett/octeon/sys/mips/mips
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Author: jmallett
Date: Fri Apr 30 03:14:47 2010
New Revision: 207417
URL: http://svn.freebsd.org/changeset/base/207417

Log:
  Use the right bus overrides for the generic bus space until I can be bothered
  to put an Octeon-specific one in place.
  
  We need to be able to access 64-bit addresses via bus_space, but we don't need
  to do everything with 64-bit accesses.  That's just the uart code, which seems
  to use its own bus space anyway.

Modified:
  user/jmallett/octeon/sys/mips/mips/bus_space_generic.c

Modified: user/jmallett/octeon/sys/mips/mips/bus_space_generic.c
==============================================================================
--- user/jmallett/octeon/sys/mips/mips/bus_space_generic.c	Fri Apr 30 03:13:24 2010	(r207416)
+++ user/jmallett/octeon/sys/mips/mips/bus_space_generic.c	Fri Apr 30 03:14:47 2010	(r207417)
@@ -199,13 +199,13 @@ static struct bus_space generic_space = 
 /* Ultra-gross kludge */
 #include "opt_cputype.h"
 #if defined(TARGET_OCTEON) && (defined(__mips_n32) || defined(__mips_o32))
-#include <mips/cavium/octeon_pcmap_regs.h>
-#define rd8(a) oct_read8(a)
-#define rd16(a) oct_read16(a)
-#define rd32(a) oct_read32(a)
-#define wr8(a, v) oct_write8(a, v)
-#define wr16(a, v) oct_write16(a, v)
-#define wr32(a, v) oct_write32(a, v)
+#include <contrib/octeon-sdk/cvmx.h>
+#define rd8(a) cvmx_read64_uint8(a)
+#define rd16(a) cvmx_read64_uint16(a)
+#define rd32(a) cvmx_read64_uint32(a)
+#define wr8(a, v) cvmx_write64_uint8(a, v)
+#define wr16(a, v) cvmx_write64_uint16(a, v)
+#define wr32(a, v) cvmx_write64_uint32(a, v)
 #elif defined(CPU_SB1) && _BYTE_ORDER == _BIG_ENDIAN
 #include <mips/sibyte/sb_bus_space.h>
 #define rd8(a) sb_big_endian_read8(a)