From owner-svn-src-stable-10@FreeBSD.ORG Mon Oct 20 07:25:58 2014 Return-Path: Delivered-To: svn-src-stable-10@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [8.8.178.115]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by hub.freebsd.org (Postfix) with ESMTPS id 1A7DB959; Mon, 20 Oct 2014 07:25:58 +0000 (UTC) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:1900:2254:2068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id E06E17DA; Mon, 20 Oct 2014 07:25:57 +0000 (UTC) Received: from svn.freebsd.org ([127.0.1.70]) by svn.freebsd.org (8.14.9/8.14.9) with ESMTP id s9K7Pvjf068805; Mon, 20 Oct 2014 07:25:57 GMT (envelope-from yongari@FreeBSD.org) Received: (from yongari@localhost) by svn.freebsd.org (8.14.9/8.14.9/Submit) id s9K7PvHl068804; Mon, 20 Oct 2014 07:25:57 GMT (envelope-from yongari@FreeBSD.org) Message-Id: <201410200725.s9K7PvHl068804@svn.freebsd.org> X-Authentication-Warning: svn.freebsd.org: yongari set sender to yongari@FreeBSD.org using -f From: Pyun YongHyeon Date: Mon, 20 Oct 2014 07:25:57 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-10@freebsd.org Subject: svn commit: r273305 - stable/10/sys/dev/mii X-SVN-Group: stable-10 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-stable-10@freebsd.org X-Mailman-Version: 2.1.18-1 Precedence: list List-Id: SVN commit messages for only the 10-stable src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 20 Oct 2014 07:25:58 -0000 Author: yongari Date: Mon Oct 20 07:25:57 2014 New Revision: 273305 URL: https://svnweb.freebsd.org/changeset/base/273305 Log: MFC r271073: Do not blindly announce 1000baseT half-duplex capability in autonegotiation. Some controllers like cgem(4) do not support half-duplex at gigabit speeds. Modified: stable/10/sys/dev/mii/e1000phy.c Directory Properties: stable/10/ (props changed) Modified: stable/10/sys/dev/mii/e1000phy.c ============================================================================== --- stable/10/sys/dev/mii/e1000phy.c Mon Oct 20 07:15:04 2014 (r273304) +++ stable/10/sys/dev/mii/e1000phy.c Mon Oct 20 07:25:57 2014 (r273305) @@ -169,8 +169,12 @@ e1000phy_attach(device_t dev) PHY_RESET(sc); sc->mii_capabilities = PHY_READ(sc, MII_BMSR) & sc->mii_capmask; - if (sc->mii_capabilities & BMSR_EXTSTAT) + if (sc->mii_capabilities & BMSR_EXTSTAT) { sc->mii_extcapabilities = PHY_READ(sc, MII_EXTSR); + if ((sc->mii_extcapabilities & + (EXTSR_1000TFDX | EXTSR_1000THDX)) != 0) + sc->mii_flags |= MIIF_HAVE_GTCR; + } device_printf(dev, " "); mii_phy_add_media(sc); printf("\n"); @@ -325,8 +329,7 @@ e1000phy_service(struct mii_softc *sc, s speed = 0; switch (IFM_SUBTYPE(ife->ifm_media)) { case IFM_1000_T: - if ((sc->mii_extcapabilities & - (EXTSR_1000TFDX | EXTSR_1000THDX)) == 0) + if ((sc->mii_flags & MIIF_HAVE_GTCR) == 0) return (EINVAL); speed = E1000_CR_SPEED_1000; break; @@ -363,10 +366,9 @@ e1000phy_service(struct mii_softc *sc, s if (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T) { gig |= E1000_1GCR_MS_ENABLE; - if ((ife->ifm_media & IFM_ETH_MASTER) != 0) + if ((ife->ifm_media & IFM_ETH_MASTER) != 0) gig |= E1000_1GCR_MS_VALUE; - } else if ((sc->mii_extcapabilities & - (EXTSR_1000TFDX | EXTSR_1000THDX)) != 0) + } else if ((sc->mii_flags & MIIF_HAVE_GTCR) != 0) gig = 0; PHY_WRITE(sc, E1000_1GCR, gig); PHY_WRITE(sc, E1000_AR, E1000_AR_SELECTOR_FIELD); @@ -497,9 +499,14 @@ e1000phy_mii_phy_auto(struct mii_softc * PHY_WRITE(sc, E1000_AR, reg | E1000_AR_SELECTOR_FIELD); } else PHY_WRITE(sc, E1000_AR, E1000_FA_1000X_FD | E1000_FA_1000X); - if ((sc->mii_extcapabilities & (EXTSR_1000TFDX | EXTSR_1000THDX)) != 0) - PHY_WRITE(sc, E1000_1GCR, - E1000_1GCR_1000T_FD | E1000_1GCR_1000T); + if ((sc->mii_flags & MIIF_HAVE_GTCR) != 0) { + reg = 0; + if ((sc->mii_extcapabilities & EXTSR_1000TFDX) != 0) + reg |= E1000_1GCR_1000T_FD; + if ((sc->mii_extcapabilities & EXTSR_1000THDX) != 0) + reg |= E1000_1GCR_1000T; + PHY_WRITE(sc, E1000_1GCR, reg); + } PHY_WRITE(sc, E1000_CR, E1000_CR_AUTO_NEG_ENABLE | E1000_CR_RESTART_AUTO_NEG);