From nobody Tue Jan 13 17:00:47 2026 X-Original-To: dev-commits-src-main@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4drFqz3qLwz6NQGJ for ; Tue, 13 Jan 2026 17:00:47 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R13" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4drFqz2qv5z3cHd for ; Tue, 13 Jan 2026 17:00:47 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1768323647; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=A0oRmN0J7b0PLsjfKTI0ah52qXZcspKpks6XFqbApMU=; b=WQxgR4KeVahWbzxu+i3TfRobAJ+cRldee3NCQSi0ZJlc0pIzYZdRy2GfA55Y5rNUYxuCWa VMXbya+5R+8bKpFpjUA++b4FnnN29djXHLabPixI7KsSaBE+/9aSG4Cr6TSqGgMsBa5pV3 ub70zRtxj/nidksFKWr4ksZSKXIm4NZ04iNAJNRJ9TrpVobNEz/DLu1es+7QZusgHSk6B5 BDAifWSgYVEhtTDIMdj5Sa0XTxLw7llIcPzld6Idh+JM2NgBy4S04cyoRVIezSMteRX6JK BtiosWbOs9GyGO/2D6IjE+/JywUkNzr0b45YhSt7mzbVF0l4Wp+aw4JxnejF7g== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1768323647; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=A0oRmN0J7b0PLsjfKTI0ah52qXZcspKpks6XFqbApMU=; b=AIUT1Fa9QzI8pAbqIVQPVfyD+VUql+es6sDhpYyP7iUNvxIXVjn2aIx/AHnIYWAsqFvWLD sPt83h1Fzq8RNUYJaWBJ7bmflU4AT0u4gENI1sg6br+gwDdV+A8fG1FgpnyOH1Tb5RkJUB /JqT3FJkQCKE2XjzrDfHwk7QY8aC4fTecZQaM14vzQOEevhSICdRLfW25/tM18xbx7UbG0 MAlOV2oiPMGHuban8ctek0lJgXCnrGWKlNA13hf+L/ao5MX9fsb/EWkq4PLvMKQPWrC4Xm gnsuPrJQMtnYOvwbsQ/RiumXUVKAGadnkypRY9VMc43dLj4De/OjYg1Tfo6wtg== ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1768323647; a=rsa-sha256; cv=none; b=hrdt+o7MMfOIwwqGG0lh2jtEEIfgV93yFJFHvCEys59DTEcutG4hqfaHzBLas71Kzl0uOe wG3OLKqFfpkm2qgNWAj/EJv5FO5i1DL8ckLDrfr1HyDCuSFMu8tqzCe+zuwfWSxhnUhy3G v6OR67EwlxWCxtBNHW+Hybh4KW9nh913fIF+Oc/69juLOSjKZdPZt/djSl7OQf5/oY3ORG SzaecYIVu5V+FVitNHYrXiUxvE5YcvBw3mQOp6QO0dS2b32LTQVo6kLu7ev1/KaXYE/UXK n8TJOS5lKvnBGyHaCeuSy/f96rGH/d4T7MVpj+tGNFGTOrj9i82HrGH1loo3bA== ARC-Authentication-Results: i=1; mx1.freebsd.org; none Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) by mxrelay.nyi.freebsd.org (Postfix) with ESMTP id 4drFqz2P5wz5r9 for ; Tue, 13 Jan 2026 17:00:47 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from git (uid 1279) (envelope-from git@FreeBSD.org) id 3430e by gitrepo.freebsd.org (DragonFly Mail Agent v0.13+ on gitrepo.freebsd.org); Tue, 13 Jan 2026 17:00:47 +0000 To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org Cc: Sarah Walker From: Andrew Turner Subject: git: 0685fc435c2b - main - arm64: Add FEAT_MOPS register fields List-Id: Commit messages for the main branch of the src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-main List-Help: List-Post: List-Subscribe: List-Unsubscribe: X-BeenThere: dev-commits-src-main@freebsd.org Sender: owner-dev-commits-src-main@FreeBSD.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: andrew X-Git-Repository: src X-Git-Refname: refs/heads/main X-Git-Reftype: branch X-Git-Commit: 0685fc435c2b6750762d50985bc6876dede5fbe2 Auto-Submitted: auto-generated Date: Tue, 13 Jan 2026 17:00:47 +0000 Message-Id: <69667a3f.3430e.39dc046@gitrepo.freebsd.org> The branch main has been updated by andrew: URL: https://cgit.FreeBSD.org/src/commit/?id=0685fc435c2b6750762d50985bc6876dede5fbe2 commit 0685fc435c2b6750762d50985bc6876dede5fbe2 Author: Sarah Walker AuthorDate: 2026-01-13 15:26:10 +0000 Commit: Andrew Turner CommitDate: 2026-01-13 15:27:57 +0000 arm64: Add FEAT_MOPS register fields (commit message by andrew@) Reviewed by: andrew Sponsored by: Arm Ltd --- sys/arm64/include/armreg.h | 26 +++++++++++++++++++++++++- 1 file changed, 25 insertions(+), 1 deletion(-) diff --git a/sys/arm64/include/armreg.h b/sys/arm64/include/armreg.h index 27b02c44cd76..28dec3a40b26 100644 --- a/sys/arm64/include/armreg.h +++ b/sys/arm64/include/armreg.h @@ -592,6 +592,27 @@ #define ISS_MSR_REG(reg) \ __ISS_MSR_REG(reg##_op0, reg##_op1, reg##_CRn, reg##_CRm, reg##_op2) +#define ISS_MOE_MEMINST_SHIFT 24 +#define ISS_MOE_MEMINST (0x01 << ISS_MOE_MEMINST_SHIFT) +#define ISS_MOE_isSETG_SHIFT 24 +#define ISS_MOE_isSETG (0x01 << ISS_MOE_isSETG_SHIFT) +#define ISS_MOE_OPTIONS_SHIFT 19 +#define ISS_MOE_OPTIONS_MASK (0x0f << ISS_MOE_OPTIONS_SHIFT) +#define ISS_MOE_FROM_EPILOGUE_SHIFT 18 +#define ISS_MOE_FROM_EPILOGUE (0x01 << ISS_MOE_FROM_EPILOGUE_SHIFT) +#define ISS_MOE_FORMAT_OPTION_SHIFT 16 +#define ISS_MOE_FORMAT_OPTION_MASK (0x03 << ISS_MOE_FORMAT_OPTION_SHIFT) +#define ISS_MOE_FORMAT_OPTION_B (0x00 << ISS_MOE_FORMAT_OPTION_SHIFT) +#define ISS_MOE_FORMAT_OPTION_A (0x01 << ISS_MOE_FORMAT_OPTION_SHIFT) +#define ISS_MOE_FORMAT_OPTION_A2 (0x02 << ISS_MOE_FORMAT_OPTION_SHIFT) +#define ISS_MOE_FORMAT_OPTION_B2 (0x03 << ISS_MOE_FORMAT_OPTION_SHIFT) +#define ISS_MOE_DESTREG_SHIFT 10 +#define ISS_MOE_DESTREG_MASK (0x1f << ISS_MOE_DESTREG_SHIFT) +#define ISS_MOE_SRCREG_SHIFT 5 +#define ISS_MOE_SRCREG_MASK (0x1f << ISS_MOE_SRCREG_SHIFT) +#define ISS_MOE_SIZEREG_SHIFT 0 +#define ISS_MOE_SIZEREG_MASK (0x1f << ISS_MOE_SIZEREG_SHIFT) + #define ISS_DATA_ISV_SHIFT 24 #define ISS_DATA_ISV (0x01 << ISS_DATA_ISV_SHIFT) #define ISS_DATA_SAS_SHIFT 22 @@ -656,6 +677,7 @@ #define EXCP_DATA_ABORT_L 0x24 /* Data abort, from lower EL */ #define EXCP_DATA_ABORT 0x25 /* Data abort, from same EL */ #define EXCP_SP_ALIGN 0x26 /* SP slignment fault */ +#define EXCP_MOE 0x27 /* Memory Operation Exception */ #define EXCP_TRAP_FP 0x2c /* Trapped FP exception */ #define EXCP_SERROR 0x2f /* SError interrupt */ #define EXCP_BRKPT_EL0 0x30 /* Hardware breakpoint, from same EL */ @@ -2627,7 +2649,9 @@ #define SCTLR_LSMAOE (UL(0x1) << 29) #define SCTLR_EnIB (UL(0x1) << 30) #define SCTLR_EnIA (UL(0x1) << 31) -/* Bits 34:32 are reserved */ +/* Bit 32 is reserved */ +#define SCTLR_MSCEn (UL(0x1) << 33) +/* Bit 34 is reserved */ #define SCTLR_BT0 (UL(0x1) << 35) #define SCTLR_BT1 (UL(0x1) << 36) #define SCTLR_ITFSB (UL(0x1) << 37)