Date: Thu, 12 Jul 2001 10:50:08 -0700 (PDT) From: Richard Hodges <rh@matriplex.com> To: mark tinguely <tinguely@web.cs.ndsu.NoDak.edu> Cc: c.prevotaux@hexanet.fr, atm@FreeBSD.ORG Subject: Re: Service Classes Message-ID: <Pine.BSF.4.10.10107121039200.26612-100000@mail.matriplex.com> In-Reply-To: <200107121731.f6CHVoL41031@web.cs.ndsu.NoDak.edu>
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On Thu, 12 Jul 2001, mark tinguely wrote:
> RH says:
> > A switch would be quite a project, if cell spacing and latency is to
> > be preserved. Hardware support is probably needed for that.
>
> I agree, you need to go to the cell level to honor the QOS agreements
> plus implement the signalling. A dedicated machine with a couple ATM
> cards and software switching software would be an ambitious project
> but would be good for people that wanted a non-production test/reseach
> environment. companies like Cisco and Lucent had to start somewhere ...
>
> --mark tinguely.
Now that you mention it, there _might_ be a decent way to implement
an ATM swtich if it did not need to "groom" the virtual circuits.
In other words, it should be possible to build a software switch
around a single-process state machine that _could_ have a relatively
constant cell latency.
Just thinking out loud, a dual-CPU system might have one CPU dedicated
to the ATM state machine, the other for management...
-Richard
-------------------------------------------
Richard Hodges | Matriplex, inc.
Product Manager | 769 Basque Way
rh@matriplex.com | Carson City, NV 89706
775-886-6477 | www.matriplex.com
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