From owner-svn-src-all@FreeBSD.ORG Tue Oct 5 18:08:08 2010 Return-Path: Delivered-To: svn-src-all@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 4FB1F1065703; Tue, 5 Oct 2010 18:08:08 +0000 (UTC) (envelope-from nwhitehorn@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 3F0E68FC08; Tue, 5 Oct 2010 18:08:08 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id o95I88pZ066001; Tue, 5 Oct 2010 18:08:08 GMT (envelope-from nwhitehorn@svn.freebsd.org) Received: (from nwhitehorn@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id o95I8819065995; Tue, 5 Oct 2010 18:08:08 GMT (envelope-from nwhitehorn@svn.freebsd.org) Message-Id: <201010051808.o95I8819065995@svn.freebsd.org> From: Nathan Whitehorn Date: Tue, 5 Oct 2010 18:08:08 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r213456 - in head/sys/powerpc: aim include X-BeenThere: svn-src-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: "SVN commit messages for the entire src tree \(except for " user" and " projects" \)" List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 05 Oct 2010 18:08:08 -0000 Author: nwhitehorn Date: Tue Oct 5 18:08:07 2010 New Revision: 213456 URL: http://svn.freebsd.org/changeset/base/213456 Log: Handle vector assist traps without a kernel panic, by setting denormalized values to zero. A correct solution would involve emulating vector operations on denormalized values, but this has little effect on accuracy and is much less complicated for now. MFC after: 2 weeks Modified: head/sys/powerpc/aim/machdep.c head/sys/powerpc/aim/trap.c head/sys/powerpc/include/altivec.h head/sys/powerpc/include/pcb.h head/sys/powerpc/include/trap_aim.h Modified: head/sys/powerpc/aim/machdep.c ============================================================================== --- head/sys/powerpc/aim/machdep.c Tue Oct 5 17:06:51 2010 (r213455) +++ head/sys/powerpc/aim/machdep.c Tue Oct 5 18:08:07 2010 (r213456) @@ -489,8 +489,8 @@ powerpc_init(vm_offset_t startkernel, vm bcopy(generictrap, (void *)EXC_SC, (size_t)&trapsize); bcopy(generictrap, (void *)EXC_FPA, (size_t)&trapsize); bcopy(generictrap, (void *)EXC_VEC, (size_t)&trapsize); - bcopy(generictrap, (void *)EXC_VECAST, (size_t)&trapsize); - bcopy(generictrap, (void *)EXC_THRM, (size_t)&trapsize); + bcopy(generictrap, (void *)EXC_VECAST_G4, (size_t)&trapsize); + bcopy(generictrap, (void *)EXC_VECAST_G5, (size_t)&trapsize); __syncicache(EXC_RSVD, EXC_LAST - EXC_RSVD); /* Modified: head/sys/powerpc/aim/trap.c ============================================================================== --- head/sys/powerpc/aim/trap.c Tue Oct 5 17:06:51 2010 (r213455) +++ head/sys/powerpc/aim/trap.c Tue Oct 5 18:08:07 2010 (r213456) @@ -203,9 +203,19 @@ trap(struct trapframe *frame) enable_vec(td); break; - case EXC_VECAST: - printf("Vector assist exception!\n"); - sig = SIGILL; + case EXC_VECAST_G4: + case EXC_VECAST_G5: + /* + * We get a VPU assist exception for IEEE mode + * vector operations on denormalized floats. + * Emulating this is a giant pain, so for now, + * just switch off IEEE mode and treat them as + * zero. + */ + + save_vec(td); + td->td_pcb->pcb_vec.vscr |= ALTIVEC_VSCR_NJ; + enable_vec(td); break; case EXC_ALI: Modified: head/sys/powerpc/include/altivec.h ============================================================================== --- head/sys/powerpc/include/altivec.h Tue Oct 5 17:06:51 2010 (r213455) +++ head/sys/powerpc/include/altivec.h Tue Oct 5 18:08:07 2010 (r213456) @@ -29,6 +29,9 @@ #ifndef _MACHINE_ALTIVEC_H_ #define _MACHINE_ALTIVEC_H_ +#define ALTIVEC_VSCR_NJ 0x00010000 /* Enable non-Java mode */ +#define ALTIVEC_VSCR_SAT 0x00000001 /* Saturation status bit */ + void enable_vec(struct thread *); void save_vec(struct thread *); Modified: head/sys/powerpc/include/pcb.h ============================================================================== --- head/sys/powerpc/include/pcb.h Tue Oct 5 17:06:51 2010 (r213455) +++ head/sys/powerpc/include/pcb.h Tue Oct 5 18:08:07 2010 (r213456) @@ -59,7 +59,7 @@ struct pcb { uint32_t vr[32][4]; register_t vrsave; register_t spare[2]; - register_t vscr; + register_t vscr; /* aligned at vector element 3 */ } pcb_vec __aligned(16); /* Vector processor */ unsigned int pcb_veccpu; /* which CPU had our vector stuff. */ Modified: head/sys/powerpc/include/trap_aim.h ============================================================================== --- head/sys/powerpc/include/trap_aim.h Tue Oct 5 17:06:51 2010 (r213455) +++ head/sys/powerpc/include/trap_aim.h Tue Oct 5 18:08:07 2010 (r213456) @@ -54,9 +54,12 @@ /* The following is only available on the 601: */ #define EXC_RUNMODETRC 0x2000 /* Run Mode/Trace Exception */ +/* The following are only available on 970(G5): */ +#define EXC_VECAST_G5 0x1700 /* AltiVec Assist */ + /* The following are only available on 7400(G4): */ #define EXC_VEC 0x0f20 /* AltiVec Unavailable */ -#define EXC_VECAST 0x1600 /* AltiVec Assist */ +#define EXC_VECAST_G4 0x1600 /* AltiVec Assist */ /* The following are only available on 604/750/7400: */ #define EXC_PERF 0x0f00 /* Performance Monitoring */