From owner-dev-commits-src-all@freebsd.org Mon Mar 8 23:27:42 2021 Return-Path: Delivered-To: dev-commits-src-all@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id 6B03755D41C; Mon, 8 Mar 2021 23:27:42 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4DvZJG2Znsz4RnZ; Mon, 8 Mar 2021 23:27:42 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 4B26611E9F; Mon, 8 Mar 2021 23:27:42 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org ([127.0.1.44]) by gitrepo.freebsd.org (8.16.1/8.16.1) with ESMTP id 128NRguw006790; Mon, 8 Mar 2021 23:27:42 GMT (envelope-from git@gitrepo.freebsd.org) Received: (from git@localhost) by gitrepo.freebsd.org (8.16.1/8.16.1/Submit) id 128NRg4J006789; Mon, 8 Mar 2021 23:27:42 GMT (envelope-from git) Date: Mon, 8 Mar 2021 23:27:42 GMT Message-Id: <202103082327.128NRg4J006789@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-main@FreeBSD.org From: Alexander Motin Subject: git: 455219675dbd - main - Change mwait_bm_avoidance use to match Linux. MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: mav X-Git-Repository: src X-Git-Refname: refs/heads/main X-Git-Reftype: branch X-Git-Commit: 455219675dbd61010e180cacdfed51e7e34111e1 Auto-Submitted: auto-generated X-BeenThere: dev-commits-src-all@freebsd.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Commit messages for all branches of the src repository List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 08 Mar 2021 23:27:42 -0000 The branch main has been updated by mav: URL: https://cgit.FreeBSD.org/src/commit/?id=455219675dbd61010e180cacdfed51e7e34111e1 commit 455219675dbd61010e180cacdfed51e7e34111e1 Author: Alexander Motin AuthorDate: 2021-03-08 22:57:46 +0000 Commit: Alexander Motin CommitDate: 2021-03-08 23:27:36 +0000 Change mwait_bm_avoidance use to match Linux. Even though the information is very limited, it seems the intent of this flag is to control ACPI_BITREG_BUS_MASTER_STATUS use for C3, not force ACPI_BITREG_ARB_DISABLE manipulations for C2, where it was never needed, and which register not really doing anything for years. It wasted lots of CPU time on congested global ACPI hardware lock when many CPU cores were trying to enter/exit deep C-states same time. On idle 80-core system it pushed ping localhost latency up to 20ms, since badport_bandlim() via counter_ratecheck() wakes up all CPUs same time once a second just to synchronously reset the counters. Now enabling C-states increases the latency from 0.1 to just 0.25ms. Discussed with: kib MFC after: 1 month --- sys/dev/acpica/acpi_cpu.c | 10 ++++++---- 1 file changed, 6 insertions(+), 4 deletions(-) diff --git a/sys/dev/acpica/acpi_cpu.c b/sys/dev/acpica/acpi_cpu.c index ce252ab92816..436dd9ddaa93 100644 --- a/sys/dev/acpica/acpi_cpu.c +++ b/sys/dev/acpica/acpi_cpu.c @@ -1153,17 +1153,19 @@ acpi_cpu_idle(sbintime_t sbt) * driver polling for new devices keeps this bit set all the * time if USB is loaded. */ + cx_next = &sc->cpu_cx_states[cx_next_idx]; if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0 && - cx_next_idx > sc->cpu_non_c3) { + cx_next_idx > sc->cpu_non_c3 && + (!cx_next->do_mwait || cx_next->mwait_bm_avoidance)) { status = AcpiReadBitRegister(ACPI_BITREG_BUS_MASTER_STATUS, &bm_active); if (ACPI_SUCCESS(status) && bm_active != 0) { AcpiWriteBitRegister(ACPI_BITREG_BUS_MASTER_STATUS, 1); cx_next_idx = sc->cpu_non_c3; + cx_next = &sc->cpu_cx_states[cx_next_idx]; } } /* Select the next state and update statistics. */ - cx_next = &sc->cpu_cx_states[cx_next_idx]; sc->cpu_cx_stats[cx_next_idx]++; KASSERT(cx_next->type != ACPI_STATE_C0, ("acpi_cpu_idle: C0 sleep")); @@ -1197,7 +1199,7 @@ acpi_cpu_idle(sbintime_t sbt) * For C3, disable bus master arbitration and enable bus master wake * if BM control is available, otherwise flush the CPU cache. */ - if (cx_next->type == ACPI_STATE_C3 || cx_next->mwait_bm_avoidance) { + if (cx_next->type == ACPI_STATE_C3) { if ((cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) { AcpiWriteBitRegister(ACPI_BITREG_ARB_DISABLE, 1); AcpiWriteBitRegister(ACPI_BITREG_BUS_MASTER_RLD, 1); @@ -1237,7 +1239,7 @@ acpi_cpu_idle(sbintime_t sbt) end_time = ((cpu_ticks() - cputicks) << 20) / cpu_tickrate(); /* Enable bus master arbitration and disable bus master wakeup. */ - if ((cx_next->type == ACPI_STATE_C3 || cx_next->mwait_bm_avoidance) && + if (cx_next->type == ACPI_STATE_C3 && (cpu_quirks & CPU_QUIRK_NO_BM_CTRL) == 0) { AcpiWriteBitRegister(ACPI_BITREG_ARB_DISABLE, 0); AcpiWriteBitRegister(ACPI_BITREG_BUS_MASTER_RLD, 0);