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Message-Id: <200802141915.m1EJFkCm017279@repoman.freebsd.org>
From: Marcel Moolenaar <marcel@FreeBSD.org>
Date: Thu, 14 Feb 2008 19:15:46 +0000 (UTC)
To: src-committers@FreeBSD.org, cvs-src@FreeBSD.org, cvs-all@FreeBSD.org
X-FreeBSD-CVS-Branch: RELENG_7
Cc: 
Subject: cvs commit: src/sys/ia64/ia64 machdep.c pmap.c
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marcel      2008-02-14 19:15:46 UTC

  FreeBSD src repository

  Modified files:        (Branch: RELENG_7)
    sys/ia64/ia64        machdep.c pmap.c 
  Log:
  Insta MFC: machdep.c:1.230, pmap.c:1.197
  
  On Montecito processors, the instruction cache is in fact not
  coherent with the data caches. Implement a quick fix to allow
  us to boot on Montecito, while I'm working on a better fix in
  the mean time.
  
  Commit made on Montecito-based Itanium...
  
  Revision   Changes    Path
  1.225.2.2  +6 -0      src/sys/ia64/ia64/machdep.c
  1.191.2.2  +13 -0     src/sys/ia64/ia64/pmap.c