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Date: Mon, 20 Apr 2009 13:03:41 -0500
From: Nathan Whitehorn <nwhitehorn@freebsd.org>
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To: Robert Watson <rwatson@FreeBSD.org>
References: <200904192019.n3JKJDa6019179@svn.freebsd.org>
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Cc: svn-src-head@FreeBSD.org, svn-src-all@FreeBSD.org,
	src-committers@FreeBSD.org, Bruce Evans <brde@optusnet.com.au>
Subject: Re: svn commit: r191276 - in head/sys: amd64/include arm/include
 i386/include ia64/include mips/include powerpc/include sparc64/include
 sun4v/include
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Robert Watson wrote:
>
> On Mon, 20 Apr 2009, Bruce Evans wrote:
>
>>> +#ifndef CACHE_LINE_SHIFT
>>> +#define    CACHE_LINE_SHIFT    6
>>> +#endif
>>> +#define    CACHE_LINE_SIZE        (1 << CACHE_LINE_SHIFT)
>>
>> This still has the bogus ifdef.  Overriding the definition is 
>> difficult to do consistently even in a kernel with no modules, since 
>> CACHE_LINE_SIZE is not a kernel option.  Overriding the definition 
>> makes negative sense since the value is a maximum-maximum (possibly 
>> larger than strictly needed) so that it can be constant.
>
> OK, I've made this change.  My hope is that most applications don't 
> resort to including sys/param.h and using CACHE_LINE_SIZE -- most will 
> be able to query it at run-time using interfaces we don't yet have 
> (such as sysconf(3) and some appropriate constant).  I also hope that 
> most kernel consumers will be able to use a run-time tuned version 
> (which we also don't yet have).
On PowerPC, we currently define a kernel global cacheline_size 
(md_var.h) and a sysctl machdep.cacheline_size with this information. 
This is currently used in various places in the kernel and in the 
userland RTLD for properly synchronizing the instruction cache.
-Nathan