From owner-freebsd-arch Sun Jan 20 18:57:45 2002 Delivered-To: freebsd-arch@freebsd.org Received: from rover.village.org (rover.bsdimp.com [204.144.255.66]) by hub.freebsd.org (Postfix) with ESMTP id EE3E737B41A for ; Sun, 20 Jan 2002 18:57:42 -0800 (PST) Received: from harmony.village.org (harmony.village.org [10.0.0.6]) by rover.village.org (8.11.3/8.11.3) with ESMTP id g0L2vfl46775; Sun, 20 Jan 2002 19:57:41 -0700 (MST) (envelope-from imp@village.org) Received: from localhost (warner@rover2.village.org [10.0.0.1]) by harmony.village.org (8.11.6/8.11.6) with ESMTP id g0L2vex41985; Sun, 20 Jan 2002 19:57:40 -0700 (MST) (envelope-from imp@village.org) Date: Sun, 20 Jan 2002 19:57:25 -0700 (MST) Message-Id: <20020120.195725.87764038.imp@village.org> To: peter.jeremy@alcatel.com.au Cc: wollman@khavrinen.lcs.mit.edu, arch@FreeBSD.ORG Subject: Re: 64 bit counters again From: "M. Warner Losh" In-Reply-To: <20020121125522.G72285@gsmx07.alcatel.com.au> References: <20020121082826.Z72285@gsmx07.alcatel.com.au> <200201202251.g0KMpq032842@khavrinen.lcs.mit.edu> <20020121125522.G72285@gsmx07.alcatel.com.au> X-Mailer: Mew version 2.1 on Emacs 21.1 / Mule 5.0 (SAKAKI) Mime-Version: 1.0 Content-Type: Text/Plain; charset=us-ascii Content-Transfer-Encoding: 7bit Sender: owner-freebsd-arch@FreeBSD.ORG Precedence: bulk List-ID: List-Archive: (Web Archive) List-Help: (List Instructions) List-Subscribe: List-Unsubscribe: X-Loop: FreeBSD.ORG In message: <20020121125522.G72285@gsmx07.alcatel.com.au> Peter Jeremy writes: : >Actually, the SPARC would be similar to the Intel. I think only Alpha : >and MIPS implemented the LL/SC version of this primitive. Not all MIPS processors have LL/SC. Vr41xx lack this, for example. However, there are no SMP Vr41xx systems, and I don't think any can be made due to all that cache coherency and interprocessor locking crap being removed :-) Warner To Unsubscribe: send mail to majordomo@FreeBSD.org with "unsubscribe freebsd-arch" in the body of the message