From owner-freebsd-scsi@freebsd.org Wed Jul 29 13:22:51 2015 Return-Path: Delivered-To: freebsd-scsi@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 6FCF09AC022 for ; Wed, 29 Jul 2015 13:22:51 +0000 (UTC) (envelope-from dan@langille.org) Received: from clavin2.langille.org (clavin2.langille.org [199.233.228.197]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client CN "clavin.langille.org", Issuer "StartCom Class 2 Primary Intermediate Server CA" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4DB96132D for ; Wed, 29 Jul 2015 13:22:51 +0000 (UTC) (envelope-from dan@langille.org) Received: from (clavin2.int.langille.org (clavin2.int.unixathome.org [10.4.7.7]) (Authenticated sender: hidden) with ESMTPSA id 9D569AE52 ; Wed, 29 Jul 2015 13:22:43 +0000 (UTC) Content-Type: text/plain; charset=utf-8 Mime-Version: 1.0 (Mac OS X Mail 8.2 \(2102\)) Subject: Re: dmesg output not as expected From: Dan Langille In-Reply-To: <27741F67-95F8-4EEF-B42F-E80626799FCB@yahoo.com> Date: Wed, 29 Jul 2015 09:22:42 -0400 Cc: freebsd-scsi@freebsd.org Content-Transfer-Encoding: quoted-printable Message-Id: <0B4EA0B0-5A90-4D12-98F3-142DF829C086@langille.org> References: <5A302DC6-C3EF-4DB1-8AD1-A0314C048A28@langille.org> <27741F67-95F8-4EEF-B42F-E80626799FCB@yahoo.com> To: Scott Long X-Mailer: Apple Mail (2.2102) X-BeenThere: freebsd-scsi@freebsd.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: SCSI subsystem List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 29 Jul 2015 13:22:51 -0000 > On Jul 28, 2015, at 11:56 PM, Scott Long wrote: >=20 >=20 >> On Jul 28, 2015, at 8:18 PM, Dan Langille wrote: >>=20 >> After rebooting this server, I see this in /var/run/dmesg. Why does = it change? >>=20 >> ch0 at mpt0 bus 0 scbus14 target 3 lun 0 >> ch0: Removable Changer SCSI-2 device >> ch0: Serial Number 3G22JJP38S46 >> ch0: 20.000MB/s transfers (10.000MHz DT, offset 15, 16bit) >> ch0: 25 slots, 1 drive, 1 picker, 1 portal >> ch0: quirks=3D0x2 >>=20 >> I was hoping to get more through put on this newer system with a = different card. =46rom what I see, my speed is only half of what it = was. >>=20 >> I'm using a PCI-E 3.0 X8 (in X16) slot. Have I missing something? >>=20 >=20 > The LSI controllers do Domain Validation. That means that they send a = series of test commands to each target to try to determine a safe speed = to negotiate to. The theory is that these test commands will determine = whether the target=E2=80=99s speed needs to be downshifted in order to = avoid problems with bad cables and bad connectors. It=E2=80=99s part of = the Ultra320 spec, and I think it was in the Ultra160 spec too, but was = rarely implemented there. It=E2=80=99s possible that the DV routine is = telling the card that these devices need to have their negotiated speed = reduced, and that the results it gets are a bit on-the-fence at times = and cause different observed speeds. >=20 > It=E2=80=99s been a long time since I worked with DV, so my memory is = a bit fuzzy. The Adaptec hardware never did DV other than a really = simple algorithm in the BIOS for the U320 cards, and I=E2=80=99m pretty = sure that the Symbios cards pre-date DV all-together. I think that the = MPT controllers do DV in the firmware at boot, and the driver just reads = the results and uses that for the default negotiation settings. I = don=E2=80=99t see much in the MPT driver for debugging this, but I = recall that the DV algorithm that LSI used was pretty naive and = overly-aggressive at forcing down negotiation. You might want to look = at what options the LSI BIOS offers, or if you can use camcontrol to = change the negotiation up to where you think it should be. I went into the BIOS and took photos of what I found. They seem to be = set to optimal values. Do you see anything I should investigate further? These photos are not necessarily in any particularly order. https://dl.dropboxusercontent.com/u/24218593/LSI-BIOS-1.jpeg https://dl.dropboxusercontent.com/u/24218593/LSI-BIOS-2.jpeg https://dl.dropboxusercontent.com/u/24218593/LSI-BIOS-3.jpeg https://dl.dropboxusercontent.com/u/24218593/LSI-BIOS-4.jpeg =E2=80=94=20 Dan Langille http://langille.org/