From owner-svn-src-stable-11@freebsd.org Wed Jan 4 19:22:43 2017 Return-Path: Delivered-To: svn-src-stable-11@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id 31DD6C9FB0B; Wed, 4 Jan 2017 19:22:43 +0000 (UTC) (envelope-from gonzo@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 09979125B; Wed, 4 Jan 2017 19:22:42 +0000 (UTC) (envelope-from gonzo@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v04JMg1X051806; Wed, 4 Jan 2017 19:22:42 GMT (envelope-from gonzo@FreeBSD.org) Received: (from gonzo@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v04JMgna051805; Wed, 4 Jan 2017 19:22:42 GMT (envelope-from gonzo@FreeBSD.org) Message-Id: <201701041922.v04JMgna051805@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: gonzo set sender to gonzo@FreeBSD.org using -f From: Oleksandr Tymoshenko Date: Wed, 4 Jan 2017 19:22:42 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-stable@freebsd.org, svn-src-stable-11@freebsd.org Subject: svn commit: r311303 - stable/11/sys/dev/iwn X-SVN-Group: stable-11 MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-stable-11@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for only the 11-stable src tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Wed, 04 Jan 2017 19:22:43 -0000 Author: gonzo Date: Wed Jan 4 19:22:42 2017 New Revision: 311303 URL: https://svnweb.freebsd.org/changeset/base/311303 Log: MFC r309822, r310375 r309822: [iwn] Perform BUS_DMASYNC_PREREAD when initializing RX buffer BUS_DMASYNC_PREREAD is required when setting up RX buffer, otherwise data provided by card can be overwritten by data evicted from cache Also use proper tag when setting up RX descriptor Reviewed by: adrian, avos, ivadasz Differential Revision: https://reviews.freebsd.org/D8717 r310375: [iwn] Several fixes for DMA part of iwn(4) - Perform DMS sync when accessing/initializing ICT table - Fix some DMA sync operations to use matching tags Reviewed by: avos Differential Revision: https://reviews.freebsd.org/D8804 Modified: stable/11/sys/dev/iwn/if_iwn.c Directory Properties: stable/11/ (props changed) Modified: stable/11/sys/dev/iwn/if_iwn.c ============================================================================== --- stable/11/sys/dev/iwn/if_iwn.c Wed Jan 4 18:54:20 2017 (r311302) +++ stable/11/sys/dev/iwn/if_iwn.c Wed Jan 4 19:22:42 2017 (r311303) @@ -1909,6 +1909,9 @@ iwn_alloc_rx_ring(struct iwn_softc *sc, goto fail; } + bus_dmamap_sync(ring->data_dmat, data->map, + BUS_DMASYNC_PREREAD); + /* Set physical address of RX buffer (256-byte aligned). */ ring->desc[i] = htole32(paddr >> 8); } @@ -2116,6 +2119,9 @@ iwn5000_ict_reset(struct iwn_softc *sc) memset(sc->ict, 0, IWN_ICT_SIZE); sc->ict_cur = 0; + bus_dmamap_sync(sc->ict_dma.tag, sc->ict_dma.map, + BUS_DMASYNC_PREWRITE); + /* Set physical address of ICT table (4KB aligned). */ DPRINTF(sc, IWN_DEBUG_RESET, "%s: enabling ICT\n", __func__); IWN_WRITE(sc, IWN_DRAM_INT_TBL, IWN_DRAM_INT_TBL_ENABLE | @@ -3039,14 +3045,19 @@ iwn_rx_done(struct iwn_softc *sc, struct if (error != 0 && error != EFBIG) { panic("%s: could not load old RX mbuf", __func__); } + bus_dmamap_sync(ring->data_dmat, data->map, + BUS_DMASYNC_PREREAD); /* Physical address may have changed. */ ring->desc[ring->cur] = htole32(paddr >> 8); - bus_dmamap_sync(ring->data_dmat, ring->desc_dma.map, + bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map, BUS_DMASYNC_PREWRITE); counter_u64_add(ic->ic_ierrors, 1); return; } + bus_dmamap_sync(ring->data_dmat, data->map, + BUS_DMASYNC_PREREAD); + m = data->m; data->m = m1; /* Update RX descriptor. */ @@ -4075,6 +4086,8 @@ iwn_intr(void *arg) /* Read interrupts from ICT (fast) or from registers (slow). */ if (sc->sc_flags & IWN_FLAG_USE_ICT) { + bus_dmamap_sync(sc->ict_dma.tag, sc->ict_dma.map, + BUS_DMASYNC_POSTREAD); tmp = 0; while (sc->ict[sc->ict_cur] != 0) { tmp |= sc->ict[sc->ict_cur]; @@ -4610,7 +4623,7 @@ iwn_tx_data(struct iwn_softc *sc, struct } bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_PREWRITE); - bus_dmamap_sync(ring->data_dmat, ring->cmd_dma.map, + bus_dmamap_sync(ring->cmd_dma.tag, ring->cmd_dma.map, BUS_DMASYNC_PREWRITE); bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map, BUS_DMASYNC_PREWRITE); @@ -4803,7 +4816,7 @@ iwn_tx_data_raw(struct iwn_softc *sc, st } bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_PREWRITE); - bus_dmamap_sync(ring->data_dmat, ring->cmd_dma.map, + bus_dmamap_sync(ring->cmd_dma.tag, ring->cmd_dma.map, BUS_DMASYNC_PREWRITE); bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map, BUS_DMASYNC_PREWRITE); @@ -5136,7 +5149,7 @@ iwn_cmd(struct iwn_softc *sc, int code, bus_dmamap_sync(ring->data_dmat, data->map, BUS_DMASYNC_PREWRITE); } else { - bus_dmamap_sync(ring->data_dmat, ring->cmd_dma.map, + bus_dmamap_sync(ring->cmd_dma.tag, ring->cmd_dma.map, BUS_DMASYNC_PREWRITE); } bus_dmamap_sync(ring->desc_dma.tag, ring->desc_dma.map,