From owner-svn-src-head@FreeBSD.ORG Thu Jul 29 05:15:00 2010 Return-Path: Delivered-To: svn-src-head@freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 250D71065674; Thu, 29 Jul 2010 05:15:00 +0000 (UTC) (envelope-from neel@FreeBSD.org) Received: from svn.freebsd.org (svn.freebsd.org [IPv6:2001:4f8:fff6::2c]) by mx1.freebsd.org (Postfix) with ESMTP id 13F418FC1D; Thu, 29 Jul 2010 05:15:00 +0000 (UTC) Received: from svn.freebsd.org (localhost [127.0.0.1]) by svn.freebsd.org (8.14.3/8.14.3) with ESMTP id o6T5Ex0O040368; Thu, 29 Jul 2010 05:14:59 GMT (envelope-from neel@svn.freebsd.org) Received: (from neel@localhost) by svn.freebsd.org (8.14.3/8.14.3/Submit) id o6T5ExV4040366; Thu, 29 Jul 2010 05:14:59 GMT (envelope-from neel@svn.freebsd.org) Message-Id: <201007290514.o6T5ExV4040366@svn.freebsd.org> From: Neel Natu Date: Thu, 29 Jul 2010 05:14:59 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Cc: Subject: svn commit: r210596 - head/sys/mips/mips X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Thu, 29 Jul 2010 05:15:00 -0000 Author: neel Date: Thu Jul 29 05:14:59 2010 New Revision: 210596 URL: http://svn.freebsd.org/changeset/base/210596 Log: Fix build for o32 kernels. The emulation of 'ld' and 'sd' instructions only works for ABIs that support 64-bit registers and the instructions 'ldl' and 'ldr' that operate on those registers. Reviewed by: jmallett Modified: head/sys/mips/mips/trap.c Modified: head/sys/mips/mips/trap.c ============================================================================== --- head/sys/mips/mips/trap.c Thu Jul 29 02:32:21 2010 (r210595) +++ head/sys/mips/mips/trap.c Thu Jul 29 05:14:59 2010 (r210596) @@ -1497,6 +1497,7 @@ mips_unaligned_load_store(struct trapfra reg[MIPS_INST_RT(inst)] = value; return (MIPS_LW_ACCESS); +#if defined(__mips_n32) || defined(__mips_n64) case OP_LD: KASSERT(mode == VM_PROT_READ, ("access mode must be read for load instruction.")); ldl_macro(value, addr); @@ -1504,6 +1505,7 @@ mips_unaligned_load_store(struct trapfra ldr_macro(value, addr); reg[MIPS_INST_RT(inst)] = value; return (MIPS_LD_ACCESS); +#endif case OP_SH: KASSERT(mode == VM_PROT_WRITE, ("access mode must be write for store instruction.")); @@ -1522,6 +1524,7 @@ mips_unaligned_load_store(struct trapfra swr_macro(value, addr); return (MIPS_SW_ACCESS); +#if defined(__mips_n32) || defined(__mips_n64) case OP_SD: KASSERT(mode == VM_PROT_WRITE, ("access mode must be write for store instruction.")); value = reg[MIPS_INST_RT(inst)]; @@ -1529,6 +1532,7 @@ mips_unaligned_load_store(struct trapfra addr += 7; sdr_macro(value, addr); return (MIPS_SD_ACCESS); +#endif } panic("%s: should not be reached.", __func__); }