From owner-freebsd-mobile@FreeBSD.ORG Sun Jul 23 20:29:53 2006 Return-Path: X-Original-To: freebsd-mobile@freebsd.org Delivered-To: freebsd-mobile@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id BCA5C16A4DA for ; Sun, 23 Jul 2006 20:29:53 +0000 (UTC) (envelope-from douglas_goodall@mac.com) Received: from smtpout.mac.com (smtpout.mac.com [17.250.248.171]) by mx1.FreeBSD.org (Postfix) with ESMTP id 7CF3A43D45 for ; Sun, 23 Jul 2006 20:29:52 +0000 (GMT) (envelope-from douglas_goodall@mac.com) Received: from mac.com (smtpin07-en2 [10.13.10.152]) by smtpout.mac.com (Xserve/8.12.11/smtpout01/MantshX 4.0) with ESMTP id k6NKTqLo002568 for ; Sun, 23 Jul 2006 13:29:52 -0700 (PDT) Received: from dougwide (pool-71-102-161-156.snloca.dsl-w.verizon.net [71.102.161.156]) (authenticated bits=0) by mac.com (Xserve/smtpin07/MantshX 4.0) with ESMTP id k6NKTjeU012863 for ; Sun, 23 Jul 2006 13:29:51 -0700 (PDT) From: "Douglas W. Goodall" To: Date: Sun, 23 Jul 2006 13:29:49 -0700 Message-ID: <000901c6ae96$c03a2000$6dce46c0@dougwide> MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit X-Priority: 1 (Highest) X-MSMail-Priority: High X-Mailer: Microsoft Office Outlook 11 X-MIMEOLE: Produced By Microsoft MimeOLE V6.00.2900.2869 Importance: High Thread-Index: Acaulr6bIjDuv/6YTESv4pqXu3gfoA== Subject: Stray irq 7's X-BeenThere: freebsd-mobile@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: Mobile computing with FreeBSD List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Sun, 23 Jul 2006 20:29:53 -0000 I am a very knowlegeable OS software engineer and I know the stray irq7 problem intimately. The PIC (programable interrupt controller) used in PCs is sensitive and will raise an IR7 interrupt without a valid cause. This has been going on since S100 systems. We used to call it the vacuum cleaner interrupt because just about anything can cause it. The only fix for it is to enhance the source code of the interrupt routine to accept the interrupt and scrub the PIC. The problem is documented in the Intel publications. I have the same problem with my Sharp PC-MM20. You have two choices. See if you can ignore the problem, if it doesn't occur too often. Or encourage the FreeBSD Engineers to add the required code to the interrupt code. Or do it yourself. The PIC is complicated though and if you place it in the wrong mode, things will not work correctly. Douglas W. Goodall Long term FreeBSD supporter