From nobody Wed Sep 21 09:46:41 2022 X-Original-To: dev-commits-src-branches@mlmmj.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mlmmj.nyi.freebsd.org (Postfix) with ESMTP id 4MXYTZ1MMQz4cthj; Wed, 21 Sep 2022 09:46:42 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4MXYTZ0SPwz3dnj; Wed, 21 Sep 2022 09:46:42 +0000 (UTC) (envelope-from git@FreeBSD.org) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1663753602; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=sJL/m/z6vjtwylk8sMOyTkirsc4T86yLtB9H3uLfq58=; b=IRvuVrjrgkIZS5QhBRN/rnc0eihXNRzcz9WcePjC8RR8xfgUL0oQ1kld+XgeB5Yw8QceoZ Qx8jSFedOiUeDPz+udHbWRa2ou3DBtAbEsdXMhKdAZJ1eeo3D2axFaVyOaOo/NrfT2V9LA gkoXGu72vRl3N/14gJ+ah4GC6Am4TbiwrlSa+bNLOtdTg08r0aueXckUatMI/YMUHqDxp0 dGH1CUlycVolMmcDR8eL5IgNSB7zpfX44nHLUrRlYpxX+KX70ChrbTKcZN62b50CoWnDsv ECGyLDjVyioGyOL6oa1Ix+IuWsCrCO7ENcKjWRep9aTjJR4uFqiMfmfENdJsjw== Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id 4MXYTY680Pz11k7; Wed, 21 Sep 2022 09:46:41 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org ([127.0.1.44]) by gitrepo.freebsd.org (8.16.1/8.16.1) with ESMTP id 28L9kfo6076049; Wed, 21 Sep 2022 09:46:41 GMT (envelope-from git@gitrepo.freebsd.org) Received: (from git@localhost) by gitrepo.freebsd.org (8.16.1/8.16.1/Submit) id 28L9kfIw076048; Wed, 21 Sep 2022 09:46:41 GMT (envelope-from git) Date: Wed, 21 Sep 2022 09:46:41 GMT Message-Id: <202209210946.28L9kfIw076048@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org From: Andrew Turner Subject: git: 18d20e86d7a1 - stable/13 - Add an IDC only arm64 icache sync function List-Id: Commits to the stable branches of the FreeBSD src repository List-Archive: https://lists.freebsd.org/archives/dev-commits-src-branches List-Help: List-Post: List-Subscribe: List-Unsubscribe: Sender: owner-dev-commits-src-branches@freebsd.org X-BeenThere: dev-commits-src-branches@freebsd.org MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: andrew X-Git-Repository: src X-Git-Refname: refs/heads/stable/13 X-Git-Reftype: branch X-Git-Commit: 18d20e86d7a105317847986fe7aca8fd647746c0 Auto-Submitted: auto-generated ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=freebsd.org; s=dkim; t=1663753602; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:mime-version:mime-version:content-type:content-type: content-transfer-encoding:content-transfer-encoding; bh=sJL/m/z6vjtwylk8sMOyTkirsc4T86yLtB9H3uLfq58=; b=CumbmnOtKWQ0xkIsM8Xp5s9QGSqeZURqsP7U/57csLjnE9ShcxYPOASNCBBl8Dt+pdSZ9K gYf5oixrLLk0aEwrfIdYOjfw4dLK5mS9l3j3E4nQ+T1AGgMPCXR7HuXe6HaE14vyglPas7 9utIbgtEeIQEDbRGtUxX9AwuSJDR1i+2X2h2k90gPAmu7+Oi01cX1l71inahRJoRJ9CRi7 pfc6hK8JQnVeJj09ifqdNBqAinktlX32xDk9jJgMfJ+TXxM01+fZEfr4Nfbsu412cl6jzr QkPtKJmiIdmSvKhoJqstm6QQVBd2eq1ZD5vnfUNPvWjXOuv/FKdJNkcY9J8dlg== ARC-Seal: i=1; s=dkim; d=freebsd.org; t=1663753602; a=rsa-sha256; cv=none; b=KLdfyhY5Ie7Boirqz02lyoqCn0ObnfkC7ZjhjjLHKUVv53Em52Fw21y9TpQ0fgQsoXv8Gi a53w1IboKkfp2SV1yklZ8wDNLDQSsEAH9atCwOkSINN1PuhS3if/faQWvJXmumzWhmclW+ Dx5uNe9TI+V2An6j5+Hm+QeWKzBWVpAiWh24eYwh6sMWssdySxhVNvld2W6+jkNWeR4SiG mBINsbA3qUcfcbotT2H9zcLn/efXTTk7V+BlkMK3b0ochQj57XEgi9Buaw0c0EZXaW5OLM 2YuJy5KtCQr9IIvj0PWUFzbjbkaAse2ZGRXq6zNiFnr1kQLGDNJfLW4Ky/bPsQ== ARC-Authentication-Results: i=1; mx1.freebsd.org; none X-ThisMailContainsUnwantedMimeParts: N The branch stable/13 has been updated by andrew: URL: https://cgit.FreeBSD.org/src/commit/?id=18d20e86d7a105317847986fe7aca8fd647746c0 commit 18d20e86d7a105317847986fe7aca8fd647746c0 Author: Andrew Turner AuthorDate: 2022-08-22 17:02:13 +0000 Commit: Andrew Turner CommitDate: 2022-09-21 09:45:52 +0000 Add an IDC only arm64 icache sync function When the IDC flag is set in the cache type register we don't need to clean the data cache to the point of unification. Previously we supported this flag being set only when the DIC flags was also set. Add a new handler for when this is not the case. Reviewed by: kib Sponsored by: The FreeBSD Foundation, Ampere (hardware) Differential Revision: https://reviews.freebsd.org/D36296 (cherry picked from commit 7a060a8895b8e6c1cd0afded15da27c373eb0de9) --- sys/arm64/arm64/cpufunc_asm.S | 12 ++++++++++++ sys/arm64/arm64/identcpu.c | 4 ++++ sys/arm64/include/cpufunc.h | 1 + 3 files changed, 17 insertions(+) diff --git a/sys/arm64/arm64/cpufunc_asm.S b/sys/arm64/arm64/cpufunc_asm.S index 2f28c4f68271..927bcafcf1e1 100644 --- a/sys/arm64/arm64/cpufunc_asm.S +++ b/sys/arm64/arm64/cpufunc_asm.S @@ -143,6 +143,18 @@ ENTRY(arm64_dic_idc_icache_sync_range) ret END(arm64_dic_idc_icache_sync_range) +/* + * void arm64_idc_aliasing_icache_sync_range(vm_offset_t, vm_size_t) + * When the CTR_EL0.IDC bit is set cleaning to PoU becomes a dsb. + */ +ENTRY(arm64_idc_aliasing_icache_sync_range) + dsb ishst + ic ialluis + dsb ish + isb + ret +END(arm64_idc_aliasing_icache_sync_range) + /* * void arm64_aliasing_icache_sync_range(vm_offset_t, vm_size_t) */ diff --git a/sys/arm64/arm64/identcpu.c b/sys/arm64/arm64/identcpu.c index 93c7dd973c66..dacfe37990a1 100644 --- a/sys/arm64/arm64/identcpu.c +++ b/sys/arm64/arm64/identcpu.c @@ -1825,6 +1825,10 @@ identify_cpu_sysinit(void *dummy __unused) arm64_icache_sync_range = &arm64_dic_idc_icache_sync_range; if (bootverbose) printf("Enabling DIC & IDC ICache sync\n"); + } else if (idc) { + arm64_icache_sync_range = &arm64_idc_aliasing_icache_sync_range; + if (bootverbose) + printf("Enabling IDC ICache sync\n"); } if ((elf_hwcap & HWCAP_ATOMICS) != 0) { diff --git a/sys/arm64/include/cpufunc.h b/sys/arm64/include/cpufunc.h index 16133903841f..691474bac90e 100644 --- a/sys/arm64/include/cpufunc.h +++ b/sys/arm64/include/cpufunc.h @@ -241,6 +241,7 @@ extern void (*arm64_icache_sync_range)(vm_offset_t, vm_size_t); void arm64_nullop(void); void arm64_tlb_flushID(void); void arm64_dic_idc_icache_sync_range(vm_offset_t, vm_size_t); +void arm64_idc_aliasing_icache_sync_range(vm_offset_t, vm_size_t); void arm64_aliasing_icache_sync_range(vm_offset_t, vm_size_t); int arm64_icache_sync_range_checked(vm_offset_t, vm_size_t); void arm64_dcache_wbinv_range(vm_offset_t, vm_size_t);