From owner-svn-src-head@freebsd.org Tue Oct 13 03:10:05 2015 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id C1AB9A10C66; Tue, 13 Oct 2015 03:10:05 +0000 (UTC) (envelope-from cem@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 87DF39A9; Tue, 13 Oct 2015 03:10:05 +0000 (UTC) (envelope-from cem@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id t9D3A4hZ043787; Tue, 13 Oct 2015 03:10:04 GMT (envelope-from cem@FreeBSD.org) Received: (from cem@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id t9D3A4Uq043786; Tue, 13 Oct 2015 03:10:04 GMT (envelope-from cem@FreeBSD.org) Message-Id: <201510130310.t9D3A4Uq043786@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: cem set sender to cem@FreeBSD.org using -f From: "Conrad E. Meyer" Date: Tue, 13 Oct 2015 03:10:04 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r289205 - head/sys/dev/ntb/ntb_hw X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.20 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 13 Oct 2015 03:10:05 -0000 Author: cem Date: Tue Oct 13 03:10:04 2015 New Revision: 289205 URL: https://svnweb.freebsd.org/changeset/base/289205 Log: NTB: MFV 87034511: Correct Number of Scratch Pad Registers The NTB Xeon hardware has 16 scratch pad registers and 16 back-to-back scratch pad registers. Correct the #define to represent this and update the variable names to reflect their usage. Authored by: Jon Mason Obtained from: Linux Sponsored by: EMC / Isilon Storage Division Modified: head/sys/dev/ntb/ntb_hw/ntb_regs.h Modified: head/sys/dev/ntb/ntb_hw/ntb_regs.h ============================================================================== --- head/sys/dev/ntb/ntb_hw/ntb_regs.h Tue Oct 13 02:34:41 2015 (r289204) +++ head/sys/dev/ntb/ntb_hw/ntb_regs.h Tue Oct 13 03:10:04 2015 (r289205) @@ -37,7 +37,7 @@ #define XEON_MSIX_CNT 4 #define XEON_MAX_SPADS 16 -#define XEON_MAX_COMPAT_SPADS 8 +#define XEON_MAX_COMPAT_SPADS 16 /* Reserve the uppermost bit for link interrupt */ #define XEON_MAX_DB_BITS 15 #define XEON_DB_BITS_PER_VEC 5