From owner-svn-src-head@freebsd.org Tue Apr 18 07:02:13 2017 Return-Path: Delivered-To: svn-src-head@mailman.ysv.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:1900:2254:206a::19:1]) by mailman.ysv.freebsd.org (Postfix) with ESMTP id E130ED4305B; Tue, 18 Apr 2017 07:02:13 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org (repo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:0]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (Client did not present a certificate) by mx1.freebsd.org (Postfix) with ESMTPS id 938FFC65; Tue, 18 Apr 2017 07:02:13 +0000 (UTC) (envelope-from dim@FreeBSD.org) Received: from repo.freebsd.org ([127.0.1.37]) by repo.freebsd.org (8.15.2/8.15.2) with ESMTP id v3I72CTo053932; Tue, 18 Apr 2017 07:02:12 GMT (envelope-from dim@FreeBSD.org) Received: (from dim@localhost) by repo.freebsd.org (8.15.2/8.15.2/Submit) id v3I72CjH053930; Tue, 18 Apr 2017 07:02:12 GMT (envelope-from dim@FreeBSD.org) Message-Id: <201704180702.v3I72CjH053930@repo.freebsd.org> X-Authentication-Warning: repo.freebsd.org: dim set sender to dim@FreeBSD.org using -f From: Dimitry Andric Date: Tue, 18 Apr 2017 07:02:12 +0000 (UTC) To: src-committers@freebsd.org, svn-src-all@freebsd.org, svn-src-head@freebsd.org Subject: svn commit: r317079 - head/contrib/llvm/lib/Target/X86 X-SVN-Group: head MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit X-BeenThere: svn-src-head@freebsd.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: SVN commit messages for the src tree for head/-current List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 18 Apr 2017 07:02:14 -0000 Author: dim Date: Tue Apr 18 07:02:12 2017 New Revision: 317079 URL: https://svnweb.freebsd.org/changeset/base/317079 Log: Pull in r300429 from upstream llvm trunk (by Benjamin Kramer): [X86] Remove special handling for 16 bit for A asm constraints. Our 16 bit support is assembler-only + the terrible hack that is .code16gcc. Simply using 32 bit registers does the right thing for the latter. Fixes PR32681. This fixes some cases of assembling 16 bit code (i.e. SeaBIOS) that uses the 'A' inline asm constraint, after r316989. MFC after: 3 days X-MFC-With: r316989 Modified: head/contrib/llvm/lib/Target/X86/X86ISelLowering.cpp head/contrib/llvm/lib/Target/X86/X86RegisterInfo.td Modified: head/contrib/llvm/lib/Target/X86/X86ISelLowering.cpp ============================================================================== --- head/contrib/llvm/lib/Target/X86/X86ISelLowering.cpp Tue Apr 18 06:58:04 2017 (r317078) +++ head/contrib/llvm/lib/Target/X86/X86ISelLowering.cpp Tue Apr 18 07:02:12 2017 (r317079) @@ -34722,14 +34722,11 @@ X86TargetLowering::getRegForInlineAsmCon if (Subtarget.is64Bit()) { Res.first = X86::RAX; Res.second = &X86::GR64_ADRegClass; - } else if (Subtarget.is32Bit()) { + } else { + assert((Subtarget.is32Bit() || Subtarget.is16Bit()) && + "Expecting 64, 32 or 16 bit subtarget"); Res.first = X86::EAX; Res.second = &X86::GR32_ADRegClass; - } else if (Subtarget.is16Bit()) { - Res.first = X86::AX; - Res.second = &X86::GR16_ADRegClass; - } else { - llvm_unreachable("Expecting 64, 32 or 16 bit subtarget"); } return Res; } Modified: head/contrib/llvm/lib/Target/X86/X86RegisterInfo.td ============================================================================== --- head/contrib/llvm/lib/Target/X86/X86RegisterInfo.td Tue Apr 18 06:58:04 2017 (r317078) +++ head/contrib/llvm/lib/Target/X86/X86RegisterInfo.td Tue Apr 18 07:02:12 2017 (r317079) @@ -438,7 +438,6 @@ def LOW32_ADDR_ACCESS_RBP : RegisterClas (add LOW32_ADDR_ACCESS, RBP)>; // A class to support the 'A' assembler constraint: [ER]AX then [ER]DX. -def GR16_AD : RegisterClass<"X86", [i16], 16, (add AX, DX)>; def GR32_AD : RegisterClass<"X86", [i32], 32, (add EAX, EDX)>; def GR64_AD : RegisterClass<"X86", [i64], 64, (add RAX, RDX)>;