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From: Konstantin Belousov <kib@FreeBSD.org>
Date: Wed, 3 Jan 2018 11:23:47 +0000 (UTC)
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Subject: svn commit: r327517 - head/sys/x86/x86
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Author: kib
Date: Wed Jan  3 11:23:47 2018
New Revision: 327517
URL: https://svnweb.freebsd.org/changeset/base/327517

Log:
  Use the new SDM-approved way to serialize x2APIC MSR writes.
  
  SDM editions 64 and below stated that it is enough to use MFENCe or
  LFENCE to serialize x2APIC register writes.  New edition 65 requires
  either full serialization instruction or MFENCE;LFENCE sequence.  Use
  the later, FreeBSD needs serialization to ensure that writes done
  before IPI request are visible to the target IPI CPU.
  
  Sponsored by:	The FreeBSD Foundation
  MFC after:	1 week

Modified:
  head/sys/x86/x86/local_apic.c

Modified: head/sys/x86/x86/local_apic.c
==============================================================================
--- head/sys/x86/x86/local_apic.c	Wed Jan  3 11:03:44 2018	(r327516)
+++ head/sys/x86/x86/local_apic.c	Wed Jan  3 11:23:47 2018	(r327517)
@@ -217,6 +217,7 @@ lapic_write32(enum LAPIC_REGISTERS reg, uint32_t val)
 
 	if (x2apic_mode) {
 		mfence();
+		lfence();
 		wrmsr(MSR_APIC_000 + reg, val);
 	} else {
 		*(volatile uint32_t *)(lapic_map + reg * LAPIC_MEM_MUL) = val;