From owner-freebsd-hackers Thu Nov 20 08:30:31 1997 Return-Path: Received: (from root@localhost) by hub.freebsd.org (8.8.7/8.8.7) id IAA15741 for hackers-outgoing; Thu, 20 Nov 1997 08:30:31 -0800 (PST) (envelope-from owner-freebsd-hackers) Received: from out2.ibm.net (out2.ibm.net [165.87.194.229]) by hub.freebsd.org (8.8.7/8.8.7) with ESMTP id IAA15736 for ; Thu, 20 Nov 1997 08:30:29 -0800 (PST) (envelope-from mouth@ibm.net) Received: from slip129-37-53-69.ca.us.ibm.net (slip129-37-53-69.ca.us.ibm.net [129.37.53.69]) by out2.ibm.net (8.8.5/8.6.9) with SMTP id QAA45008; Thu, 20 Nov 1997 16:30:07 GMT From: mouth@ibm.net (John Kelly) To: Bruce Evans Cc: hackers@freebsd.org Subject: Re: Status of 650 UART support Date: Thu, 20 Nov 1997 17:31:16 GMT Message-ID: <34746b1f.1864429@smtp-gw01.ny.us.ibm.net> References: <199711200737.SAA28030@godzilla.zeta.org.au> In-Reply-To: <199711200737.SAA28030@godzilla.zeta.org.au> X-Mailer: Forte Agent 1.01/16.397 MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Transfer-Encoding: 8bit X-MIME-Autoconverted: from quoted-printable to 8bit by hub.freebsd.org id IAA15737 Sender: owner-freebsd-hackers@freebsd.org X-Loop: FreeBSD.org Precedence: bulk On Thu, 20 Nov 1997 18:37:00 +1100, Bruce Evans wrote: >I think you can actually ready bit 7 to see if there is a full fifo >(with no parity/framing/overrun errors) and, if it is set, read the >entire fifo before reading the LSR again. This gives close to one I/O >per input byte. It is a bit tricky to handle error cases and quitting >properly - we don't want to fall back to two I/O's per input byte. The Startech databook makes no mention of LSR bit 7 indicating a full FIFO, only a dirty one. Same for all the literature I have on the NS 16550. Apparently you can use the FIFO trigger level to read a block of bytes without checking LSR bit 0 every time -- the Startech data book even suggests it. To handle all cases, especially multiport shared interrupt cards where you don't know which UART generated the receiver interrupt, you must first check the IIR (Startech calls it the ISR -- interrupt Status register) to see if the UART generated a received data interrupt. After emptying the block, you could leave any remaining characters in the FIFO, and simply get them on the next interrupt, avoiding the need of checking LSR bit 0 for bytes beyond the block size. John