Skip site navigation (1)Skip section navigation (2)
Date:      Thu, 21 Jun 2012 11:52:10 +0200
From:      Kristof Provost <kristof@sigsegv.be>
To:        Alexander Motin <mav@FreeBSD.org>
Cc:        freebsd-arm@FreeBSD.org
Subject:   Re: Cache write-back issue on Marvell SoC (SheevaPlug)
Message-ID:  <20120621095210.GK9423@thebe.jupiter.sigsegv.be>
In-Reply-To: <4FE2EDBA.1030505@FreeBSD.org>
References:  <4FE2EDBA.1030505@FreeBSD.org>

next in thread | previous in thread | raw e-mail | index | archive | help
On 2012-06-21 12:47:38 (+0300), Alexander Motin <mav@FreeBSD.org> wrote:
> Unluckily I have no idea in arm assembler and cache control
> interfaces. Could somebody recheck existing D-cache range write-back
> code, because there seems to be a problem?
> 
There's a general problem with the Kirkwood (and possibly other chips, I
don't know) in that area.

I've run into similar problems on my OpenRD, using a USB stick.

There's a little more information in arm/158950.

Regards,
Kristof




Want to link to this message? Use this URL: <https://mail-archive.FreeBSD.org/cgi/mid.cgi?20120621095210.GK9423>