From owner-p4-projects@FreeBSD.ORG Tue May 13 16:17:35 2003 Return-Path: Delivered-To: p4-projects@freebsd.org Received: by hub.freebsd.org (Postfix, from userid 32767) id 0CCBD37B404; Tue, 13 May 2003 16:17:35 -0700 (PDT) Delivered-To: perforce@freebsd.org Received: from mx1.FreeBSD.org (mx1.freebsd.org [216.136.204.125]) by hub.freebsd.org (Postfix) with ESMTP id 9A4D637B401 for ; Tue, 13 May 2003 16:17:34 -0700 (PDT) Received: from repoman.freebsd.org (repoman.freebsd.org [216.136.204.115]) by mx1.FreeBSD.org (Postfix) with ESMTP id 2403943F75 for ; Tue, 13 May 2003 16:17:34 -0700 (PDT) (envelope-from marcel@freebsd.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.12.6/8.12.6) with ESMTP id h4DNHX0U054845 for ; Tue, 13 May 2003 16:17:33 -0700 (PDT) (envelope-from marcel@freebsd.org) Received: (from perforce@localhost) by repoman.freebsd.org (8.12.6/8.12.6/Submit) id h4DNHX4A054842 for perforce@freebsd.org; Tue, 13 May 2003 16:17:33 -0700 (PDT) Date: Tue, 13 May 2003 16:17:33 -0700 (PDT) Message-Id: <200305132317.h4DNHX4A054842@repoman.freebsd.org> X-Authentication-Warning: repoman.freebsd.org: perforce set sender to marcel@freebsd.org using -f From: Marcel Moolenaar To: Perforce Change Reviews Subject: PERFORCE change 31101 for review X-BeenThere: p4-projects@freebsd.org X-Mailman-Version: 2.1.1 Precedence: list List-Id: p4 projects tree changes List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Tue, 13 May 2003 23:17:36 -0000 http://perforce.freebsd.org/chv.cgi?CH=31101 Change 31101 by marcel@marcel_nfs on 2003/05/13 16:17:14 Don't create a RID map that covers the full range imposed by the number of bits implemented by the processor for the region ID. We only need 19 bits to cover 5 regions per process (5*PID_MAX=0x7a11b). Since the minimum number of bits guaranteed to be implemented is 18, we either need a 32KB map (16-bit RID) or otherwise a 64KB map (all other cases). Don't create a 2MB map simply because the processor has 24-bits in the region ID... Affected files ... .. //depot/projects/ia64_epc/sys/ia64/ia64/pmap.c#14 edit Differences ... ==== //depot/projects/ia64_epc/sys/ia64/ia64/pmap.c#14 (text+ko) ==== @@ -329,6 +329,24 @@ /* * Setup RIDs. RIDs 0..7 are reserved for the kernel. + * + * We currently need at least 19 bits in the RID because PID_MAX + * can only be encoded in 17 bits and we need RIDs for 5 regions + * per process. With PID_MAX equalling 99999 this means that we + * need to be able to encode 499995 (=5*PID_MAX). + * The Itanium processor only has 18 bits and the architected + * minimum is exactly that. So, we cannot use a PID based scheme + * in those cases. Enter pmap_ridmap... + * We should avoid the map when running on a processor that has + * implemented enough bits. This means that we should pass the + * process/thread ID to pmap. This we currently don't do, so we + * use the map anyway. However, we don't want to allocate a map + * that is large enough to cover the range dictated by the number + * of bits in the RID, because that may result in a RID map of + * 2MB in size for a 24-bit RID. A 64KB map is enough. + * The bottomline: we create a 32KB map when the processor only + * implements 18 bits (or when we can't figure it out). Otherwise + * we create a 64KB map. */ res = ia64_call_pal_static(PAL_VM_SUMMARY, 0, 0, 0); if (res.pal_status != 0) { @@ -339,14 +357,11 @@ ridbits = (res.pal_result[1] >> 8) & 0xff; if (bootverbose) printf("Processor supports %d Region ID bits\n", - ridbits); + ridbits); } + if (ridbits > 19) + ridbits = 19; - /* - * XXX: If we have enough bits in the RID to use the thread ID then - * we should avoid the overhead of the map and create unique RIDs - * based on the thread ID. - */ pmap_ridmax = (1 << ridbits); pmap_ridmapsz = pmap_ridmax / 64; pmap_ridmap = (u_int64_t *)pmap_steal_memory(pmap_ridmax / 8);