From owner-cvs-all@FreeBSD.ORG Mon Mar 3 18:20:17 2008 Return-Path: Delivered-To: cvs-all@FreeBSD.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2001:4f8:fff6::34]) by hub.freebsd.org (Postfix) with ESMTP id 9C6AC106566C; Mon, 3 Mar 2008 18:20:17 +0000 (UTC) (envelope-from raj@FreeBSD.org) Received: from repoman.freebsd.org (repoman.freebsd.org [IPv6:2001:4f8:fff6::29]) by mx1.freebsd.org (Postfix) with ESMTP id 9AEC28FC19; Mon, 3 Mar 2008 18:20:17 +0000 (UTC) (envelope-from raj@FreeBSD.org) Received: from repoman.freebsd.org (localhost [127.0.0.1]) by repoman.freebsd.org (8.14.1/8.14.1) with ESMTP id m23IKHdW071788; Mon, 3 Mar 2008 18:20:17 GMT (envelope-from raj@repoman.freebsd.org) Received: (from raj@localhost) by repoman.freebsd.org (8.14.1/8.14.1/Submit) id m23IKH9q071787; Mon, 3 Mar 2008 18:20:17 GMT (envelope-from raj) Message-Id: <200803031820.m23IKH9q071787@repoman.freebsd.org> From: Rafal Jaworowski Date: Mon, 3 Mar 2008 18:20:17 +0000 (UTC) To: src-committers@FreeBSD.org, cvs-src@FreeBSD.org, cvs-all@FreeBSD.org X-FreeBSD-CVS-Branch: HEAD Cc: Subject: cvs commit: src/sys/dev/ic quicc.h src/sys/dev/quicc quicc_bfe.h quicc_bfe_ocp.c quicc_bus.h quicc_core.c src/sys/dev/scc scc_bfe.h scc_bfe_quicc.c scc_bus.h scc_dev_quicc.c src/sys/dev/uart uart_bus_scc.c uart_dev_quicc.c X-BeenThere: cvs-all@freebsd.org X-Mailman-Version: 2.1.5 Precedence: list List-Id: CVS commit messages for the entire tree List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 03 Mar 2008 18:20:17 -0000 raj 2008-03-03 18:20:17 UTC FreeBSD src repository Modified files: sys/dev/scc scc_bfe.h scc_bus.h sys/dev/uart uart_bus_scc.c Added files: sys/dev/ic quicc.h sys/dev/quicc quicc_bfe.h quicc_bfe_ocp.c quicc_bus.h quicc_core.c sys/dev/scc scc_bfe_quicc.c scc_dev_quicc.c sys/dev/uart uart_dev_quicc.c Log: Support for Freescale QUad Integrated Communications Controller. The QUICC engine is found on various Freescale parts including MPC85xx, and provides multiple generic time-division serial channel resources, which are in turn muxed/demuxed by the Serial Communications Controller (SCC). Along with core QUICC/SCC functionality a uart(4)-compliant device driver is provided which allows for serial ports over QUICC/SCC. Approved by: cognet (mentor) Obtained from: Juniper MFp4: e500 Revision Changes Path 1.1 +111 -0 src/sys/dev/ic/quicc.h (new) 1.1 +73 -0 src/sys/dev/quicc/quicc_bfe.h (new) 1.1 +94 -0 src/sys/dev/quicc/quicc_bfe_ocp.c (new) 1.1 +39 -0 src/sys/dev/quicc/quicc_bus.h (new) 1.1 +401 -0 src/sys/dev/quicc/quicc_core.c (new) 1.7 +1 -0 src/sys/dev/scc/scc_bfe.h 1.1 +95 -0 src/sys/dev/scc/scc_bfe_quicc.c (new) 1.2 +1 -0 src/sys/dev/scc/scc_bus.h 1.1 +151 -0 src/sys/dev/scc/scc_dev_quicc.c (new) 1.2 +3 -0 src/sys/dev/uart/uart_bus_scc.c 1.1 +487 -0 src/sys/dev/uart/uart_dev_quicc.c (new)