From owner-dev-commits-src-branches@freebsd.org Mon Jul 26 16:13:58 2021 Return-Path: Delivered-To: dev-commits-src-branches@mailman.nyi.freebsd.org Received: from mx1.freebsd.org (mx1.freebsd.org [IPv6:2610:1c1:1:606c::19:1]) by mailman.nyi.freebsd.org (Postfix) with ESMTP id 4FAA966F987; Mon, 26 Jul 2021 16:13:58 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from mxrelay.nyi.freebsd.org (mxrelay.nyi.freebsd.org [IPv6:2610:1c1:1:606c::19:3]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256 client-signature RSA-PSS (4096 bits) client-digest SHA256) (Client CN "mxrelay.nyi.freebsd.org", Issuer "R3" (verified OK)) by mx1.freebsd.org (Postfix) with ESMTPS id 4GYQ395JJyz3pZp; Mon, 26 Jul 2021 16:13:57 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org (gitrepo.freebsd.org [IPv6:2610:1c1:1:6068::e6a:5]) (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits) key-exchange X25519 server-signature RSA-PSS (4096 bits) server-digest SHA256) (Client did not present a certificate) by mxrelay.nyi.freebsd.org (Postfix) with ESMTPS id B90311A238; Mon, 26 Jul 2021 16:13:54 +0000 (UTC) (envelope-from git@FreeBSD.org) Received: from gitrepo.freebsd.org ([127.0.1.44]) by gitrepo.freebsd.org (8.16.1/8.16.1) with ESMTP id 16QGDsB5006069; Mon, 26 Jul 2021 16:13:54 GMT (envelope-from git@gitrepo.freebsd.org) Received: (from git@localhost) by gitrepo.freebsd.org (8.16.1/8.16.1/Submit) id 16QGDsIY006068; Mon, 26 Jul 2021 16:13:54 GMT (envelope-from git) Date: Mon, 26 Jul 2021 16:13:54 GMT Message-Id: <202107261613.16QGDsIY006068@gitrepo.freebsd.org> To: src-committers@FreeBSD.org, dev-commits-src-all@FreeBSD.org, dev-commits-src-branches@FreeBSD.org From: Hans Petter Selasky Subject: git: 1554e2673b3b - stable/13 - mlx5en: Configure relaxed PCI read and write ordering for ethernet. MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Transfer-Encoding: 8bit X-Git-Committer: hselasky X-Git-Repository: src X-Git-Refname: refs/heads/stable/13 X-Git-Reftype: branch X-Git-Commit: 1554e2673b3b79f467fb8cdfcbbee3c73c090147 Auto-Submitted: auto-generated X-BeenThere: dev-commits-src-branches@freebsd.org X-Mailman-Version: 2.1.34 Precedence: list List-Id: Commits to the stable branches of the FreeBSD src repository List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , X-List-Received-Date: Mon, 26 Jul 2021 16:13:58 -0000 The branch stable/13 has been updated by hselasky: URL: https://cgit.FreeBSD.org/src/commit/?id=1554e2673b3b79f467fb8cdfcbbee3c73c090147 commit 1554e2673b3b79f467fb8cdfcbbee3c73c090147 Author: Hans Petter Selasky AuthorDate: 2021-06-16 13:01:57 +0000 Commit: Hans Petter Selasky CommitDate: 2021-07-26 16:04:32 +0000 mlx5en: Configure relaxed PCI read and write ordering for ethernet. This may improve performance in some configurations. Reviewed by: kib Sponsored by: Mellanox Technologies // NVIDIA Networking (cherry picked from commit de2437f19950f6758159abbde93200468d1327fa) --- sys/dev/mlx5/mlx5_en/mlx5_en_main.c | 14 +++++++++++++- sys/dev/mlx5/mlx5_ifc.h | 12 ++++++++---- 2 files changed, 21 insertions(+), 5 deletions(-) diff --git a/sys/dev/mlx5/mlx5_en/mlx5_en_main.c b/sys/dev/mlx5/mlx5_en/mlx5_en_main.c index 97438de3bc2a..02417f5f931c 100644 --- a/sys/dev/mlx5/mlx5_en/mlx5_en_main.c +++ b/sys/dev/mlx5/mlx5_en/mlx5_en_main.c @@ -3707,6 +3707,18 @@ mlx5e_build_ifp_priv(struct mlx5_core_dev *mdev, return (0); } +static void +mlx5e_mkey_set_relaxed_ordering(struct mlx5_core_dev *mdev, void *mkc) +{ + bool ro_pci_enable = + pci_get_relaxed_ordering_enabled(mdev->pdev->dev.bsddev); + bool ro_write = MLX5_CAP_GEN(mdev, relaxed_ordering_write); + bool ro_read = MLX5_CAP_GEN(mdev, relaxed_ordering_read); + + MLX5_SET(mkc, mkc, relaxed_ordering_read, ro_pci_enable && ro_read); + MLX5_SET(mkc, mkc, relaxed_ordering_write, ro_pci_enable && ro_write); +} + static int mlx5e_create_mkey(struct mlx5e_priv *priv, u32 pdn, struct mlx5_core_mr *mkey) @@ -3729,7 +3741,7 @@ mlx5e_create_mkey(struct mlx5e_priv *priv, u32 pdn, MLX5_SET(mkc, mkc, umr_en, 1); /* used by HW TLS */ MLX5_SET(mkc, mkc, lw, 1); MLX5_SET(mkc, mkc, lr, 1); - + mlx5e_mkey_set_relaxed_ordering(mdev, mkc); MLX5_SET(mkc, mkc, pd, pdn); MLX5_SET(mkc, mkc, length64, 1); MLX5_SET(mkc, mkc, qpn, 0xffffff); diff --git a/sys/dev/mlx5/mlx5_ifc.h b/sys/dev/mlx5/mlx5_ifc.h index ce8074fba3f1..d44927236f74 100644 --- a/sys/dev/mlx5/mlx5_ifc.h +++ b/sys/dev/mlx5/mlx5_ifc.h @@ -1069,12 +1069,14 @@ struct mlx5_ifc_cmd_hca_cap_bits { u8 reserved_4[0x8]; u8 log_max_cq_sz[0x8]; - u8 reserved_5[0xb]; + u8 relaxed_ordering_write_umr[0x1]; + u8 relaxed_ordering_read_umr[0x1]; + u8 reserved_5[0x9]; u8 log_max_cq[0x5]; u8 log_max_eq_sz[0x8]; - u8 relaxed_ordering_write[1]; - u8 reserved_6[0x1]; + u8 relaxed_ordering_write[0x1]; + u8 relaxed_ordering_read[0x1]; u8 log_max_mkey[0x6]; u8 reserved_7[0xb]; u8 fast_teardown[0x1]; @@ -2685,7 +2687,9 @@ struct mlx5_ifc_mkc_bits { u8 translations_octword_size[0x20]; - u8 reserved_7[0x1b]; + u8 reserved_at_1c0[0x19]; + u8 relaxed_ordering_read[0x1]; + u8 reserved_at_1d9[0x1]; u8 log_page_size[0x5]; u8 reserved_8[0x20];