Date: Sat, 8 Apr 1995 12:52:13 -0700 (PDT) From: "Rodney W. Grimes" <rgrimes@gndrsh.aac.dev.com> To: phk@ref.tfs.com (Poul-Henning Kamp) Cc: taob@gate.sinica.edu.tw, freebsd-current@FreeBSD.org Subject: Re: Disk performance Message-ID: <199504081952.MAA15923@gndrsh.aac.dev.com> In-Reply-To: <199504081947.MAA22769@ref.tfs.com> from "Poul-Henning Kamp" at Apr 8, 95 12:47:31 pm
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> > > > > > > > > > Why would taking out the L2 cache slow down data transfer to and > > > > from the primary cache? > > > > > > because checking the L2 takes time, and they don't start the mem-cycle > > > until they know they missed. > > > > You would be right if he was talking about why turning off the L2 cache > > increases memory speed. But that is not what he said ``taking out L2 > > cache slowing down L1 cache''. Nothing, nota, zippo, should effect > > L1 cache speeds other than code changes, and internal clock frequency. > > Sure, but they still need to get the stuff to put in the L1 for their > test from RAM, right ? Depends on how the program is written. The program I use will infact get the first copy from main memory, but after that the 10000 iterations are all done in the cache. I am suspecting since thier numbers are almost 2X the numbers I get they are not counting the time for the initial main memory read. The difference the person was talking about was 391 vs 407, I have already explained in other email that this was probably just due to the statistical variance of the test sample. I can produce numbers from repeated runs of my program on the same machine that have 15% variations. I can get it down to 5% if I boot single user, but it still varies (probably due to timer code accuracy). -- Rod Grimes rgrimes@gndrsh.aac.dev.com Accurate Automation Company Custom computers for FreeBSD
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